Introduction

PCB edge plating is the process of plating exposed copper connections along the edges of a printed circuit board with a metallic coating like gold or tin to facilitate electrical connections. This article provides a comprehensive overview of PCB edge plating including its purpose, edge connector types, plating processes, inspection, reliability factors, and future trends.

What is a PCB Edge Connector?

A PCB edge connector refers to the gold plated contact fingers or pads arrayed along one or more edges of a circuit board that mate with a corresponding connector. The board edge fits into a slot to make electrical contact.

Edge connectors allow boards to be easily installed, removed, and replaced from electronic systems.

Why Use PCB Edge Connectors?

Key benefits of edge connectors:

• Allow insertion/removal of PCBs from system
• Wipe contact action for reliable connections
• Component-less connections simplify assembly
• Easy to fabricate and integrate on PCB
• No soldering required
• Withstand thousands of mating cycles
• Support high density contact configurations
• Enable high frequency signaling

These factors make edge connectors highly versatile and cost-effective.

Types of Edge Connectors

Common edge connector configurations include:

Single Row Edges

• One row of contacts on board edge
• Less costly, lower density
• Used for prototypes or low complexity

Dual Row Edges

• Two parallel rows of staggered contacts
• Allows higher number of connections
• Improves mechanical alignment

Multi-Row Edges

• More than two rows, or rows on multiple edges
• Further increases connection density
• Complex PCB layout

High Density Edges

• Very narrow pitch between contacts
• Up to 600+ connections on single edge
• May use dual-beam cantilever contacts

Edge Contact Plating

To provide conductivity and protect copper traces, edge contacts require metallic plating like:

• Gold – Most common, resistant to oxidation/corrosion
• Tin – Lower cost but susceptible to oxidation over time
• Palladium-Nickel – Avoid tin whisker issues, lower cost
• Gold Flash over Nickel – Combines low cost nickel with gold outer layer

A minimum thickness like 50 μin of gold ensures durability over 10,000+ mating cycles.

PCB Edge Plating Process Steps

A typical PCB edge plating process involves:

1. Drilling holes for edge contacts
2. Copper electroless then electrolytic plating
3. Etching to form isolated traces
4. Surface preparation like microetching
5. Immersion plating of gold or other metal
6. Cleaning then drying boards
7. Quality inspection – thickness, continuity, defects
8. Electrical testing if needed

Fabrication generally follows standard PCB methods plus final plating.

Edge Plating Quality Control

Key process controls needed:

• Plating Thickness – Confirm minimum thickness met via microscopy or X-ray fluorescence. Insufficient plating risks wear or corrosion issues.
• Continuity – Verify electrical connectivity from inner layers through plated edge contacts.
• Plating Coverage – Inspect for voids or thin areas around traces.
• Overplating – Ensure plating does not excessively build up on glass weave. Can impede mating.
• Trace Geometry – Confirm dimensions match specifications.

Reliability Considerations

Several factors impact connector lifespan:

• Plating thickness – Thicker gold or tin plating improves cycle life and durability.
• PCB thickness – Boards thinner than 1 mm may bow during mating stress.
• Contact geometry – Well-designed trace shapes tolerate repeated mating forces.
• Receptacle contacts – Select robust and proven connector contact designs to match.
• Contamination – Prevent dirt, oils, or particles during handling and use.

Inspecting Assembled Connections

Key checks on completed connectors:

• Continuity – Spot check electrical conductivity through mated connection.
• Contact Engagement – Confirm full insertion with visual checks.
• Marks/Damage – Inspect for signs of wear, scrapes, or damage after assembly cycles.
• Contamination – Verify absence of particles or films from handling.

Edge Connector Standards

Key specifications and standards for edge connectors:

• IPC-2223 – Sectional requirements for PCB edge contacts
• IPC-6013 – Qualification and performance of edge connections
• IPC/EIA J-STD-002 – Solderability tests for component leads/terminations
• IEC 60352-5 – Reliability testing and requirements

Compliance to standards ensures quality and reliability goals are met.

PCB Layout Guidelines

To optimize edge connector performance:

• Minimize total board thickness
• Ensure adequate board rigidity
• Include integrated stiffener ribs if needed
• Avoid placing components along connector edge
• Include generous fillets at trace corners
• Fanout inner layer traces gradually

Reviewing layouts with the receptacle supplier is recommended.

Edge Connector Applications

Edge connectors see wide usage across:

• Computers – Daughtercards, memory modules, backplanes
• Telecom – Switching cards, router cards, base stations
• Military/Aerospace – Mission systems, navigation cards
• Medical – MRI, ultrasound, imaging cards
• Automotive – Engine control units, instrument clusters
• Consumer – Set-top boxes, game consoles

Edge connectors enable quick field replacement of electronics cards or modules across industries.

Future Trends

Edge connector technology continues advancing:

• Increasing Density – More contacts in thinner boards enabling complex interconnection.
• Higher Frequencies – Extending signal integrity to 10+ Gbps rates.
• Improved Durability – Advanced plating and contact shaping for 10,000+ mating cycles.
• Lower Costs – Simplified fabrication allowing broader adoption.

Connector manufacturers and PCB fabricators are driving progress.

Conclusion

In summary, PCB edge plating and connectors offer a versatile and cost-effective interconnection method widely used for replaceable subsystems, cards, and modules across many industries. Edge connectors will continue meeting the challenges of denser contacts, thinner boards, faster signaling, and improved reliability thanks to ongoing advancements in plating technology, board materials, and precision manufacturing techniques. While alternative approaches like board-to-board connectors exist, the simplicity and convenience of edge connectors ensures their usage well into the future anytime field replaceability of circuits is required.

FAQs

Q: What is the most common metal used for edge connector plating?

A: Gold is by far the most popular thanks to its durability and resistance to corrosion and oxidation over thousands of mating cycles.

Q: What are some key reliability concerns with edge connectors?

A: Insufficient plating thickness, contamination, poor contact design, and inadequate board thickness or rigidity impact connector lifespan.

Q: How many mating cycles can a robust edge connector withstand?

A: Well designed gold plated connectors using suitable PCB thickness can achieve 10,000 cycles or more.

Q: What are some alternatives to PCB edge connectors?

A: Board-to-board connectors, hybrid edge connectors, and high density board stacking connectors offer other options.

Q: What is the main benefit of using dual row edge connectors versus single row?

A: Dual row configurations double the connection density by interleaving two staggered rows of contacts.

How to do PCB edge plating ?

At present, there are two kinds of PCB board edge design: metallization and non-metallization. For non-metallization, manufacturers in the industry have matured, but the metallization technology is still immature. Nowadays, more customers’ production needs are turning to PCB metal edging. Therefore, the quality of PCB metal edging has become the focus of customers’ and manufacturers’ attention because its quality directly affects the use of products.

The necessity of PCB metal edging

Metalized edging means that the edge of the board must be metalized. English description: Edge plating, border plated, plated contour, side plating, side metal, etc.

More electronic products start to minimize the product volume as the goal so that PCB will use electroplated nickel and gold surface treatment(ENIG) technology. In the production process, the gold-plated finger process can achieve the gold-cladding of the solder joints. Still, it is necessary to separately make the lead-through solder joints and the board edges, even though they are removed after gold plating. It is only convenient for the production of gold-clad solder joints on the side of the board. The production process of electroplating nickel gold is simple. It is unnecessary to make the leads separately, but only the top layer of the solder joints can be plated with gold, and the side plated with gold can not be produced. The gold-plated nickel-gold plating process on the side of the circuit board can achieve the top layer gold plating and the side-side gold plating at the same time.

Metallization edging process:

Drilling —- Milling metalized slot hole —- Removing dirt —- Plated-through hole

Drawing of engineering documents for metallized edging

1. Determine the area where the board needs to be metalized.

• When most customers are designing the circuit, the copper is stretched out on the outer edge of the board. When this happens, you need to consider whether the edge of the board needs to be hemmed and if the metalized edging is needed during production (must require formal instructions from the customer).

• Sources of information: One is Gerber files, and the others are PDF, TXT, DWG, etc.

• Design and precautions of metallized edging board

• Copy the outline layer in the design file to the pthrou layer to make a closed long slot.

Note that since copper plating is required at the encapsulation, the copper thickness has a specific thickness. Therefore, when making the hemming shape, compensation should be considered.

• After finishing the edging groove, the next step is to determine the electrical connectivity of the edging.

In order to determine which layer should be connected to the hemming, the following sequence should be followed:

• Find out which layers and areas the customer requires to connect.
• Clear the connection requirements of each layer.

• Precautions for the production of metalized edging lines

• For the edged board, in order to prevent film chipping, it is necessary to ensure that the pad is 10MIL on one side. Whether in the board, on the side, or outside the board, it must have a 10MIL pad. If it needs to be added or changed, it must be confirmed by the customer. If there are pads near the edging, the pads’ distance and the edging disk should be at least 8MIL. If it cannot be satisfied, feedback and confirmation are required.

• After the hemming, the connection of the inner and outer layers must be checked. The connection method between the layers must be determined to avoid electrical and ground short circuits after the hemming.

• If there is a plated film, the edging must be processed like a PTH groove, and there must be a disk. Pay special attention: the edging of the special-shaped groove should also be the same as the hole, which needs to be filled and enlarged by 4mil.

Solder mask design for metallized edging

For the solder mask, the edging groove must be fully windowed.

• Bounding solder mask opening = Bounding pad +0.16mm

Outline problem for metallized edging

In order to improve production efficiency, CAM must use standard milling cutters to make edging grooves, such as: 0.8, 1.0, 1.6, 2.0, 2.4mm.

Remarks: If this is not in the customer’s requirement, please choose 2.0mm or greater.

Panel design requirements and choice of surface treatment

• The long direction of the edging slot must be parallel to the long side of the rear panel (the direction of the edging slot is parallel to the running direction of the tin spray).

• For orders that do not meet the above requirements, the project pre-review will require the customer to confirm the use of non-sprayed surface processes such as gold or copper-nickel plating.

Other matters needing attention

• If the antenna position is too large, it will affect the customer’s welding or signal transmission.
• The inner cladding pad is connected to the wire in the board, causing a Short circuit.
• The stamp hole is designed at the edging slot, which must be treated with two drills.

Remarks:

If the stamp hole is placed in a drill, the plate may break due to the irregular forces when the plate swings back and forth in the electroplating cylinder.

If the bridge width is insufficient when spraying tin, the plate may break due to the force of the wind knife when spraying tin.

The production process of plate-side gold-plated nickel-gold plating:

The process of plating the sidewalls of the circuit board with gold and electroplating nickel and gold includes:

1. Etching – Forms an etching groove on the copper surface of the circuit board. The etching groove extends along the pattern to be coated with gold on the sidewall, so that the copper layer needs to be coated with gold.
2. The side walls are exposed – A dry film is pasted on the copper layer, and an opening is formed on the dry film. The opening corresponds to the etching groove and the area of the copper plate surrounded by gold that needs to be covered with gold.
3. Expose the side walls – Electroplating the circuit board so that the copper plate area and the side walls are plated with a layer of nickel and gold.

If the copper plate area is an independent pad, lead is separately added.

The distance between the circumferential edge of the window and the circumferential edge of the copper plate area is 4 mils.

During electroplating, nickel and gold are formed on the upper surface and sidewalls of the copper plate area at the same time to achieve the top layer gold plating and the sidewall gold coating.

Description of the drawings

Reference signs in the figure: 1. Etching groove, 2. Copper layer, 3. Sidewall, 4. Dry film, 5. Copper plate area, 6. Open window, 7. Substrate, 8. Open window, 9. Dry film.

Specific operation instructions:

The gold plating nickel-gold electroplating process on the sidewall of the circuit board includes: Forming an etching groove (1) on the copper surface of the circuit board by etching. The etching groove (1) extends along the pattern to be coated with gold on the side of the board; this is why the copper layer (2) is required. The gold-clad sidewall (3) is exposed, and a dry film (4) is pasted on the copper layer (2). An opening (6) is formed on the dry film (4), which corresponds to the etching groove (1) and its surroundings. The copper plate area (5) that needs to be coated with gold is provided and exposed to the side walls. The circuit board is electroplated with nickel and gold so that both the copper plate area (5) and the side walls (3) are plated with a layer of nickel and gold.

When making a circuit board, as shown in Figure 1, paste a dry film (9) on the outer sidewall of the copper layer (2). Form an opening (8) on the dry film (9), which corresponds to the to-be-formed etching groove (1) and shape. Then, etching is performed, thereby forming an etching groove (1). One side wall (3) of the etching groove (1) needs to be side-clad with gold in the subsequent process.

Then, a dry film (4) is pasted on the outer wall of the copper layer (2). Simultaneously, the dry film (4) is formed with a window corresponding to the copper plate area (5) to be gold-plated, gold-clad on the side of the board, and the etching groove (1) around it.

Finally, it’s time to electroplate the circuit board. Since the upper surface and side surfaces of the copper plate area (5) are not covered with the dry film (4), nickel and gold can be formed on the upper surface and sidewalls of the copper plate area (5) during electroplating. This is to achieve top-layer gold plating and board edge gold plating at the same time.

Preferably, if the copper plate area (5) is an independent pad, a lead is added separately.

Preferably, the distance between the circumferential edge of the window (6) and the circumferential edge of the copper plate area (5) is 4 mils. In this way, it is convenient for the syrup to enter the pad’s sidewall position, and gold-cladding on the side of the board is achieved when electroplating is complete.

Technical characteristics of the gold plating on the sidewall of the circuit board:

A process for coating the sidewalls of a circuit board with gold and electroplating nickel and gold is characterized in that it comprises:

• An etching groove is formed on the copper surface of the circuit board by etching. The etching groove extends along the pattern to be coated with gold on the sidewall. This exposes the sidewall of the copper layer that needs to be coated with gold.

• Paste a dry film on the copper layer, and form a window on the dry film. The window corresponds to the etching groove and the area of the copper plate that needs to be covered with gold and exposed to the sidewall.

• Electroplating the circuit board with nickel and gold so that the copper plate area and the sidewall are plated with a layer of nickel and gold.

• The process of plating the sidewall of the circuit board with gold and electroplating nickel and gold is that the distance between the circumferential edge of the window opening and the circumferential edge of the copper plate area is 4 mils.

With the increase of system speed, the timing and signal integrity problems of high-speed digital signals are important, but the EMC problems caused by the electromagnetic interference and power integrity in the system are also critical. The electromagnetic interference generated by the high-speed digital signal will cause serious mutual interference within the system and reduce the system’s anti-interference ability and generate strong electromagnetic radiation to the outer space.

This causes the system’s electromagnetic radiation emission to seriously exceed the EMC standard, making the product unable to pass EMC standard certification. The side-board radiation of a multilayer PCB is a relatively common source of electromagnetic radiation. When the unexpected current reaches the edge of the ground plane and the power plane, edge radiation occurs. The PCB board metalization edging process encloses the entire board edge with metal, so that the microwave signal cannot be radiated from the PCB board edge, thereby solving the problem of edge radiation. Of course, the use of the board edge metallization edging process will also increase the manufacturing cost of the PCB.

RayMing Electronics Co., Ltd. is a professional manufacturer of high-precision multilayer circuit boards, module immersion gold circuit boards, automotive circuit boards, driving recorders, COB power supplies, computer motherboards, medical circuit boards, module bonding boards, blind hole impedance board, thermoelectric separation copper substrate, etc. RayMing provides top-notch quality assurance and punctual delivery, a high-tech enterprise with sales as a whole. If there is a demand for side-coated gold boards, please feel free to contact us!

Wirebonding	Temperature (oC)	Pressure	Wire	Ultrasonic energy
Thermocompression	300 – 500	High	Au	No
Ultrasonic	25	Low	Au, Al	Yes
Thermosonic	100 – 150	Low	Au	Yes

Introduction

Wire bonding is a method used to electrically and mechanically join conductive wires to semiconductor chips and substrates to make interconnections. It is a key process used extensively in the assembly and packaging of integrated circuits (ICs). This article provides a comprehensive overview of wire bonding fundamentals, bonding techniques, materials, processes, inspections, applications, advantages and challenges.

Definition of Wire Bonding

Wire bonding attaches thin wires to electrically connect the contact pads on ICs to the leads or bonding areas on printed circuit boards or other assemblies. It forms a bridge to allow electrical signals to cross gaps between the IC and substrate.

The wire bonds also help conduct heat and provide shock protection to the chip.

Why Use Wire Bonding?

• Provides electrical connectivity for IC chips
• Allows routing signals in 3D space
• Bridges gaps between ICs and substrates
• Bonded wires are flexible
• Very precise bonding placement
• Can support high frequencies and data rates
• Cost effective for mass production

Wire bonding is a mature and reliable interconnect technology suitable for most IC assembly applications.

Types of Wire Bonds

The main types of wire bonds used are:

Ball Bonds

A ball bond is formed by melting the end of the wire into a sphere using a flame, spark discharge or electric arc and pressing it against a bond pad under force and ultrasonic energy. This creates the initial connection.

Wedge Bonds

A wedge bond is made by pressing a wire against the bonding area through a wedge-shaped bonding capillary, deforming it and pressing it against the surface under force and ultrasonic energy. The wire is then torn at the edge of the capillary tip.

Ribbon Bonds

Ribbon bonding joins a thin flat wire to the IC die or substrate in the same manner as round wedge bonding. It makes multiple bonds simultaneously in parallel.

Wire Bonding Techniques

The main wire bonding techniques include:

Thermosonic Bonding

Using a combination of heat and ultrasonic energy, along with force, to weld the wire to the bonding area. It is used for both ball and wedge bonding.

Thermocompression Bonding

Applying heat, force and welding pressure through the bond tool tip to deform the wire and bond it to the area. Mainly used for ball bonding.

Ultrasonic Bonding

Utilizing just ultrasonic energy and force to create a cold weld between the wire and bond area. Used for aluminum wire wedge bonding.

Wire Bonding Materials

Common wire materials include:

• Gold – Most prevalent, offers very reliable bonds
• Copper – Lower cost than gold, challenges with oxidation
• Aluminum – Only for ultrasonic wedge bonding
• Silver – Good electrical properties but bonds less reliably

Gold wire is generally preferred for critical electronics due to its excellent conductivity, bondability and corrosion resistance.

Wire Properties

Key wire properties for bonding include:

• Composition – Gold, copper, aluminum etc.
• Diameter – Typically 15 to 50 μm
• Temper – Annealed soft vs hard temper
• Coatings – Bare or coated with alloys
• Shapes – Round, ribbon, shaped customized wires

The composition, diameter and temper determine the best bonding approach.

Bonding Process Steps

Basic wire bonding process flow:

1. Prepare bond sites – Clean pads, apply heat
2. Position wire – Thread through capillary tip
3. Form first bond – Ball or wedge bond on chip die
4. Extend wire – Feed out to leadframe/substrate
5. Form second bond – Wedge bond wire to destination
6. Repeat bonding – For multiple wire connections
7. Cut excess wire – Sever final bond

This sequence is computer numerically controlled for automation.

Wire Bonding Equipment

• Bonding Tool – Precisely positions capillary tip
• Work Holder – Secures substrate using heating/cooling
• Ultrasonics – Provides ultrasonic vibration energy
• Vision – Aligns tools and materials optically
• Wire Feed – Feeds wire on demand during bonding
• Controls – Automates all parameters and positioning

Sophisticated wire bonders provide the accuracy, speed and flexibility needed.

Advantages of Wire Bonding

• Mature and well established technology
• High throughput and automation
• Handles high density I/O pitch <40 μm
• Low parasitic capacitance and inductance
• High purity wires available
• Adaptable to complex geometries
• Allows stacking dies and interposers
• Fine pitch capability down to 15 μm
• Cost effective for mass production

These benefits make wire bonding a widely utilized interconnect solution.

Wire Bonding Challenges

• Limited by length-to-diameter aspect ratio
• Wires block die access and view
• Long wires may sag during encapsulation
• Parasitic capacitance/inductance increase with length
• Not well suited for high current due to wire gauge
• Subject to corrosion and contamination over time
• Bonds may fail due to temperature cycling or moisture
• Repairs often require removing and replacing bonds

While very capable, wire bonds have inherent limitations.

Wire Bonding Inspections

Key wire bond quality inspections include:

Bond Placement Accuracy

Confirming correct positioning of each bond on its pad.

Bond Orientation

Checking orientation angle of wedge bonds against leadframe edges.

Bond Quality

Inspecting bond integrity – shape, attachment, lifted balls or wedges.

Wire Shape

Verifying proper loop height, placement and absence of kinks.

Wire Sweep

Checking wires are not excessively low from die to substrate.

Automated optical inspection improves quality and throughput.

Wire Pull Testing

bond strength can be measured by pull testing:

• Uses hook or wedge tool to lift bonded wire
• Gradually increases force until bond breaks or wire severs
• Measures maximum force at failure in grams
• Compare to minimum pull spec for acceptable strength

Manual or automated systems perform statistical sampling.

Process Controls

Key parameters requiring controls:

• Bond force – Amount of force applied
• Ultrasonic power – For thermasonic bonding
• Bond time – Duration of bonding
• Bond temperatures – Heating zones
• Wire tension – Constant tension during feeding

SPC, visual checks, and product audits ensure stability.

Wire Bonding Applications

Wire bonding sees extensive usage across:

• Consumer electronics – Mobile, IoT, wearables
• Computing – Microprocessors, memory, chipsets
• Automotive – Sensors, controls, infotainment
• Aerospace/military – Guidance systems, radars
• Medical – Implants, stimulators, imaging
• Communications – 5G, networking hardware

Any application with ICs benefits from wire bonding technology.

Emerging Technologies

Some newer technologies aim to augment wire bonding:

Ribbon Bonding

• Joins multiple wires simultaneously
• Higher throughput bonding
• Challenging ribbon handling

Stud Bumping

• Deposit gold bumps on bond pads
• Allows finer pitch than bond pads
• Issue of bump bond reliability

Remote Plasma Bonding

• Creates plasma for lower temperature bonding
• Reduces damage to sensitive devices
• Complex plasma generator required

These methods are still maturing toward volume adoption.

The Future of Wire Bonding

Despite competition from flip chip and other techniques, wire bonding will remain essential:

• Ongoing materials and equipment innovations
• Nano-scale wires enabling ultra-fine pitch
• Extending capabilities to new applications
• Allowing hybrid bonding with other interconnects
• Roadmap to at least 10 years for next-gen adoption

Wire bonding equipment and material suppliers continue advancing this vital technology.

Conclusion

In summary, wire bonding provides a proven, adaptable, and cost-effective interconnect method widely adopted across the microelectronics industry. Advancements in bonding tools, materials, and process automation continue expanding capabilities while reducing cost even further. Despite some inherent limitations, wire bonding will remain an essential manufacturing process enabling ongoing miniaturization and performance increases of integrated circuits. Even as alternative approaches emerge, wire bonding delivers unique benefits for numerous applications demanding flexibile, fine pitch, and high throughput chip connections.

FAQs

Q: What are the main differences between ball bonding and wedge bonding?

A: Ball bonding forms an initial ball whereas wedge bonding uses the side of the wire pressed into the bond pad. Also, ball bonding can only make the first bond whereas wedge bonding can make both first and second bonds.

Q: What wire size is typically used for wire bonding?

A: Most wire bonding uses wire diameters in the range of 15 to 50 microns. Specialized nano-scale wire bonding can go below 15 microns.

Q: How close together can wire bonds be placed?

A: The finest pitch wire bonding today can achieve a density down to around 15 microns between adjacent connections.

Q: What is the key benefit of ribbon bonding versus round wire?

A: Ribbon bonding can make multiple wire bonds simultaneously, boosting throughput substantially compared to round wire.

Q: What is the main factor limiting the span between wire bonds?

A: The length to diameter ratio of the thin wire limits total wire length before unwanted sagging or sweeping may occur. Typical spans are under 5 mm.

Types of Bonding Based on Shape

Common bonding shape that is used nowadays are ball, wedge bonding and flip chip bonding. In recent times, people prefer using one shape to another. Then, Why the designer prefer to one method than another ? For comparing all methods, we will explain more and compare all bonding shapes in this articles.

Ball Bonding

Ball holding is the cycle where pads are bond into a silicon die and substrate or leadframe utilizing wire which has fine diameter. The essential process of ball bonding method involve the first bonding shaping (commonly above the chip), the second bond shaping (commonly on the substrate) and the wire loop.

On the start of the wire process, the bonding equipment move down until it reach first bond area. The first bond is accomplished by making bond between a pad and a spherical ball utilizing ultrasonic energy and heat treatment. The first bond is likewise alluded to ball bond. Looping movements are planned in program to meet the requirement of package for  loop shape and height.

The second bond includes stitch bond which bonds the tail bond and the opposite end. The tail bond is required to create a tail of wire for the following ball shaping process. After the bonding equipment moves up to release the wire tail, after that the tail is off and the bonding equipment ascends to the ball shaping height. The ball shaping process is accomplished by ionization air gap in a cycle called EFO or electronic fire off. The ball resulted on this process is called a FAB or free air ball.

Keeping ball size is important for this cycle as it sets the general size bond and is relying on dependable bonding process to guarantee a conformable length of wire tail before each ball shaping. In case each bond is not shaped appropriately, there will be huge bump sizing variations.

Mechanical force fine application is important in the bonding cycle as it also set bump’s height and form. At last, shearing step with precise determination to split up the the ball and wire is important to make planar and conformable height bond.

Wedge Bonding

The bottom side of the capillary is used to squeezed a wire stub toward the bond pad, using ultrasonic energy to shape the bond among bond pad and wire, In wedge bonding method. After that, the capillary move toward the second bond area and the cycle is processed with repeating those process. When the second bond is finished, the wire is clipped and snapped over the second bond.

The important process in the wire bonding cycle  comprise accomplishing dependable bond (including first, second, and tail bond), keeping up wanted loop, and placing the bonds precisely. Throughput is a necessary point too, as it influences the device production expense. Accomplishing wanted first bond and second bonds generally needs bonding parameters optimization. DOE or design of experiment should be used to exercise parameters optimization, that comprise effect ultrasonic energy levels, mechanical force, bonding power. An appropriate free air ball dimension regularly is resolved prior to starting the DOE first-bond. Looping directions are chosen by the application necessities. There are two common loop types and those are reverse and forward. Forward looping type firstly puts a ball bond over the die, and after that puts a stitch bond on lead frame. In the other hand, the first step in a reverse bonding type, nonetheless, is putting a bump die. Right after the bump is shaped, a ball bond is put over the substrate, then shaping the stich bond over the. Low-profile looping prerequisites have pushed the developing reverse ball bonding utilization, that is a less quick method than forward bonding method.

Application of Fine-pitch. fine-pitch wire bonding competence has been exhibited in lab at 35 µm pitch. Generally 15 µm wire is utilized with 35-µm pitch ball bonding and a bonded ball with diameter around 27 µm. Fine-pitch usage needs a higher wire bonder aptitude, such as better control of ultrasonic energy level, the bonding force, and also fine wires looping ability, that is more disposed to loop influence  and weaker. A wire bonder which fulfills the fine pitch needs ought to likewise having  precise movement and submicron accuracy on vision system.

Applications of Stacked Die. Stacked pass on implementations are one of the quickest developing patterns in the semiconductor business. The urge for lighter, more intelligent, and smaller gadgets encourage this 3-D packaging research and development. Stacked die usage present variance of wire bonding difficulties, including multi level and low loop wire bonding loop free space needed, loop resistance from wire clear during molding process , and bonding to hang unsupported die verge.

Most wire bonding implementation utilize the ordinary forward bonding method, since it is quicker and more adequate for finer pitch compare to reverse bonding method. Even though, forward ball bonding method has a restriction of loop height because of the neck region over the ball. Exaggerated bending over the ball can cause crack on the neck area, which brings about dependability issues. Reverse bonding can accomplish loop height smaller than 75 µm.

Flip-Chip Bonding

Flip chip bonding is a important innovation for cutting edge microelectronic circuits packaging. It permits connection of bare chip to a substrate for packaging in a face-down arrangement, with electrical associations among the substrate and chip through conductive bumps. Flip chip assembly has numerous benefits. A primer benefit is enhancing electrical performance. flip chip little bumps connection give short electrical ways, that yield incredible electrical properties which have low resistance ,capacitance, and inductance. This brings about extraordinarily improved performance in high frequency working when compared with other bonding techniques, for example, chip wire bond over substrate.

Another key benefit of flip chip assembly method is compactness of package which decrease weight and size contrasted with traditional wire bond method. The electrical interconnection between substrate surface and pads over chip can be spread out as a zone array, as opposed to around the chip that is a particular design for wire bond arrangement. This two dimensional structure can reduce chip footprint over substrate and reduce chip space. The small physical area and low profile of flip chip construction permit small electronic package size to be fabricated. Nowadays, you can find flip chip components in number hand held gadgets, PDAs, electronic coordinators, electronic watches, cameras, and any other products.

How to Choose Proper Bonding Shape for Certain Aim?

When we reach application step, we often deal with question which method that appropriate with our need: wedge bond, flip-chip bond , and ball bond? For which reason would an engineer pick a ball bonder and not a wedge bonder or the other way around? This question come to most the engineers, as a rule, electrical attributes of the package are influenced by the wire bonding technique. Even, there are situations where particular packages have physical restriction like temperature restriction (no heat or low heat usage), avoid gold material and choose aluminum, prefer using ribbon type to wire type and fine pitch usage. This is the case where the appropriate selection of wire bond method becomes play an important role.

Commonly, ball bonding implementation are related to thermosonic and thermocompression bonding techniques. Thermocompression uses temperature from around 150^oC and mechanical pressure to make intermetallic bonding. And thermosonic adds energy from ultrasonic from the past step. With the two techniques, in any case, sparkle from an EFO or electronic fire off  under the capillary create a free air ball prior to bonding shaping. This free air ball at that point deform when the capillary directly contact with the bond pad surface and applies ultrasonics and mechanical force for several time to change ball shape. Hence the interdiffusion between the bond pad and the wire metallization happens, that creates the intermetallic bond.

Until this day, over  90% of all wire bonds method in electrical packaging use gold ball bonding technique. It is caused by quick process to make ball bonding rather than wedge bonding technique. Ball bonding needs just three movement axis (X Y Z), in the other hand wedge bonding needs four movement axis (X Y Z θ).Just gold or Au wire might be utilized in the ball bonding technique in contrast aluminum (Al) and gold wires are utilized ordinarily in wedge bonding technique. This happen because aluminum wire will oxidize throughout the EFO or electronic fire off process to shape the ball. High-volume Cu or copper wire ball bonding technique is still on research phase. To prevent copper wire being oxidized throughout the ball shaping, the EFO process is implemented into the inert gas. Table below show brief comparison between wedge bonding and ball bonding.

Applications	Wedge Bonding	Ball Bonding
Bonding Techniques	Thermosonic, Ultrasonic	Thermocompression, Thermosonic
Temperature	Au wire: T/S 120o – 200oCAl wire : U/S room temperature	T/S : 120o – 200oCT/C : 300o C
Wire size	Any size ribbon or wire	Small or < 75 µm
Pad size	Smaller size ofpad than ball bond. High performance in microwave usage. Pad size is around 2 or 3 times wire diamieter	Around 3 or 5 times of wire diameter
Pad material	Al, Au	Al, Au
Wire material	Al, Au	Au
Speed	4 wires/sec	Up to or more than 12 wires/sec

In spite of the fact that wedge bonding technique need more time than ball holding application, wedge bonding has the other numerous benefits, for instance,  fine pitch, short and low loops, and profound access. That is the reason wedge bonding is being utilized widely in optoelectronics and microwave implementation.

Typically, ball bonding method is quicker for around 5 until more than 12 wires each second. Sorts of wire material utilized for this method such as coated palladium, copper, and gold wires. Common application and package for this technique are QFP, BGA, SOP, wafer level bumping, and hybrid MCM. The ball bonding technique is proper for fine pitch implementation on 40 micrometer or less.

The ball lacking  on the primary bond gives wedge holding a benefit for a lot better pitch utilizations of 40 micrometer or less than it. Wire from aluminum is the most popular wire utilized for this cycle, trailed by gold wire. Run of the mill bundles and applications incorporate high power, optoelectronic bundling, RF microwave,  BGA, QFP, SOP, MCM half and halves and temperature-touchy implementation. Wedge bonding speeds normally ranging from 3 until 6 wires each second.

Bonding process step by step

1. Cleaning is the important process required before doing wire bond process. The metallization should be exempt from inorganic and organic pollutant. For instance, residual oil on the bonding surface area will decrease the dependability of the connection. There are two well known cleaning techniques, the one is  bright or Ultraviolet ozone cleaning  and another is plasma cleaning and. Ultraviolet ozone cleaning produces a lot of radiation (having wavelength in 2537A and 1848A) to eliminate organic contaminants. Plasma cleaning is powerful for eliminating epoxy bleed out, that is created from outgassing.

• Setting the appropriate temperature for ultrasonic, thermocompression, and thermosonic methods are important to assure wire bonding become conformable. Thermo sonic bonding process should be done on temperature ranging from 100^oC to 150^oC. Ultrasonic bonding might be done on surrounding temperature or around 25^oC or. In the other hand, Thermocompression bonding should be set around 300^oC and 500^oC.
• Setting the appropriate mechanical force for the ultrasonic, thermocompression, and thermosonic methods and gives the appropriate amount of pressure required to make solid wire bonds. Thermosonic holding needs between 0.5 and 2.5g force for each wirebond. And similar to thermosonic, ultrasonic bonding need 0.5- 2.5g mechanical force for each wire bond. Lastly, 15-25g mechanical force needed by thermocompression bonding for each wire bond.
• Setting the appropriate mechanical force is important for the ultrasonic and thermosonic bonding techniques. This is needed to guarantee bond quality, increment the force setting without over-stressing or applying on the wire. You shall know over-stressing is occurring when the mechanical pull testing tool shows a low break.
• Ensure the unit is appropriately cinched inside the work holder, because it is important that ensure no movement might happens. You can check this by prodding the item  using tweezers. In case movement is happening, the unit should be safe while high speed bonding process.
• Ensure the capillary is in good condition and works fine. Several factors, for example, bonding pad pitch, bond size, harness type, metallization, and wire diameter can affect bonding characteristics. The appropriate instrument selection is important for creating conformable wire bonding.

Wire bond Design Tips

Elude chip-to-chip interconnection – Unless performance need it, wire bonding straightforwardly between Integrated Circuit ought to be eluded. Making stitch bond will spread mechanical energy into pad surface, that may prompt cracking under, or in, the pad metallization. Crack refer to potential dependability issue; thus, intermediate bonding pads ought to be designed on the substrate.

Try not to cross the wires – Bond wires ought not crossing over between wire, bond pads, or other die. In condition that mechanical stress from external source is applied, the wire bond unsupported loop could hang and meet / touch a wire straightforwardly under it, prompting a short circuit that may damage whole system.

Keep in mind: bond pads is important – Bond pad ought to be arranged to make the the most concise possible wire bond. The wire bond length specifies connection capacitance, inductance, and total impedance of the. Long wire bonds might be bad to the package performance. Utilizing aluminum or gold wedge bonding with flash gold with is a special case. Even, it will be good to check the implementation notes for the integrated circuit package, since some integrated circuit producers do not use wedge bonding because of the mechanical force utilized to die on the production process. At least 0.005 mm is needed between a via and the verge of a bond pad. Created bond that is located near with substrate discontinuity may prompt to harming material caused by spreading mechanical energy to the substrate via bonding. If  multilayer substrates wire bonding, used pad ought to be at least 10 mm from the conductor edge to enable wire bonding tolerance, registration, and printing.

How to Select Wire for Bonding

The wire diameter selection upon maximum current limit, cost, and the wire bond pitch. Gold wire with 1-mil diameter is a typically used by designer, and has 1.17 mω electrical resistance per mil, and a maximum current limit around 0.7 A, relying upon heatsinking, wire length, and so forth Common inductance value for 1-mil wire bond is around 25 pico H per mil, however it fluctuates relying on height of bond wire. Aluminum wire is utilized exclusively in wedge-bonding implementation, as the high affinity of Aluminum to oxidize needs ball bonding with Aluminum wires to be applied in an inert environment.

Placement of Bonding

In the design process of IC package, it is critical to determine bond arrangement relative with different parts / components — a determination that will make smaller package dimension and increase layout densities. If wire bonds place the high components / parts, holding device need free space (X) and resilience for both die arrangement and bond precision should be thought of. On a stitch bond, the real bond surface is shift from centerline of capillary. Subsequently, clearance should incorporate extra tolerance, equivalent to a half of tip diameter of capillary to guarantee appropriate clearance. Therefore, Y ought to be 0.005 in. > X for tip capillary with 0.01-in. dimension. Another configuration is to utilize wedge bonding, where the bonding equipment has a vertical face. Tragically, wedge holding is more slow—and consequently more expensive—than ball-line holding.

Spacing and Pad Sizing

Table beneath gives rule of thumb to design substrate pad and determining size of die pad. The dimension relate to wedge and ball bonding and to ceramic substrate and PCB. Exemptions are noted as relevant.

Description of Spacing	Typical values :0.0007-in wire (in)	Typical values :0.001-in wire (in)
Minimum wire length	0.03	0.040
Maximum wire length	0.075	0.100
Loop height clearance over die	0.015	0.015
Minimum available ball on die pad	0.003	0.003
Maximum available wedge on die pad	0.002	0.002
1 bond substrate pad	0.010 x 0.008	0.010 x 0.008
2 bonds substrate pad	0.010 x 0.010	0.010 x 0.010
Die	0.003	0.003

Evaluating the Wirebond

Wire-bonded parts acceptability and wire bond strength might be assessed utilizing either a DPT / Destructive Pull Test or NDPT / Non-Destructive Pull Test. The most used standard are MIL-STD-883, specifically on Method 2011.7  about Bond Strength Method 2023.5. These standard portray sizes of sample for each test type and acceptance standards for various bonding and wire types. A few assessment test that is recorded in this standard such as:

• Internal visual
• Nondestructive bond pull test

• Destructive bond pull test

• Mechanical shock
• Ball bonding shear test

• Stabilization bake
• Constant acceleration

• Moisture resistance
• Random vibration

Dupont PCB ( Any Dupont PCB Enquiry Pls send mail to Sales@raypcb.com )

Electronics materials from a company with a deep understanding of materials science a commitment to technology leadership, a wide range of process expertise and a long history of innovation. DuPont offers the industry’s broadest array of high performance electronic materials. The portfolio includes materials for rigid and flexible circuits including: Kapton®, Pyralux®, Interra® and other advanced laminates.

Dupont HT

RayPCB is a leader in design and fabrication of HIGH TEMPERATURE APPLICATION FLEX CIRCUITS for use in industries such as Oil & Gas Exploration (“down hole”), Medical Instrument Sterilization (“autoclave survivability”); Engine Controls (“under hood”) and Automotive Brakes and Transmissions as well as many defense (aircraft, missile and vehicles) and space exploration applications.

RayPCB employs methodically developed process techniques along with DuPont’s new HT materials – copper clad laminate, coverlay and bondply – to fabricate state-of-the-art Flex Circuits which can operate at temperatures in excess of 250°C. The DuPont all-polyimide Pyralux HT material system have the highest temperature operating rating of any flex circuit material and provided with the long-standing quality and consistency that the industry has come value and expect from DuPont.

This proven interconnect solution gives the designer more options in solving electronic packaging challenges. With the ability to incorporate Flex Circuit and enjoy – in a high heat environment – the benefits of these three dimensional internconnects. Contact Rayming PCB Manufacturer for immediate discussion with an engineer to determine if this technology is right for your application.

“HT”, “Pyralux” and DuPont” are trademarks or registered trademarks of E. I. du Pont de Nemours and Company or its affiliates.

Dupont HT Datasheet

Dupont HT Datasheet

Dupont HT

Laminate Materials

Copper Clad Laminants

Pyralux® AC copper-clad laminate
Pyralux® AP copper-clad laminate
Pyralux® AP-PLUS all-polyimide thick copper-clad laminate
Pyralux® APR copper-clad resistor laminate
Pyralux® LF Copper-clad Laminate
Pyralux® FR copper-clad Laminate
Pyralux® TK flexible circuit material

Coverlay, Bondply & Sheet Adhesive

Pyralux® FR coverlay
Pyralux® FR bondply
Pyralux® FR sheet adhesive
Pyralux® LF coverlay
Pyralux® LF bondply
Pyralux® LF adhesive
Pyralux® LG Glass Reinforced Bonding Film
Pyralux® PC Photoimageable Coverlay

Except Dupont PCB, RayMing also offer Nelco PCB,Isola PCB, Arlon PCB manufacturing.

Dupont Pyralux series material

1. FR series has halogen bonding sheet (abbreviated as pure glue)

Product number	Glue thickness mil(um)	Packing specification	Application field
FR0100	1（25）	24in(W)*250ft 250mm*100m	FPC multilayer board, rigid board and soft-hard combined board interlayer composite
FR0200	1（51）
FR0300	1（76）
FR0400	4(102)
FR1500	1/2(13)
FR1501	0.7（18）

2. LF series halogen-free adhesive sheet (abbreviated as pure glue)

Product number	Glue thickness mil(um)	Packing specification	Application field
LF0100	1（25）	24in(W)*250ft 250mm*100m	FPC multilayer board, rigid board and soft-hard combined board interlayer composite
LF0200	1（51）
LF0300	1（76）
LF0400	4(102)
LF1500	1/2(13)
LF1501	0.7（18）

3.HXC series black cover film Coverlay

Product number	Adhesive ADH thickness mil(um)	PI thickness (um)	Packing specification	Application field
HXC1215	0.6(15)	12	249mm*200m 500mm*200m	The black epoxy type epoxy cover film designated by the Apple project has a shelf life of 4 months
HXC1220	0.8(20)	12
HXC1225	1(25)	12
HXC2525	1(25)	25

4. FR series yellow cover film Coverlay (containing halogen)

Product number	Adhesive ADH thickness mil(um)	PI thickness (um)	Packing specification	Application field
FR0110	1(25)	25	24in(610mm)* 250ft(76m)	The general industrial yellow cover film has a higher flame retardant rating than the halogen-free LF series.
FR0120	1(25)	51
FR7001	1/2(13)	13
FR7013	1(25)	13

5.LF series yellow cover film Coverlay (halogen free)

Product number	Adhesive ADH thickness mil(um)	PI thickness (um)	Packing specification	Application field
LF0110	1(25)	25	24in(610mm)* 250ft(76m) 250mm*100m	Optical and industrial halogen-free yellow cover film, normal working temperature can reach 140°C
LF0120	1(25)	51
LF7001	1/2(13)	13
LF7013	1(25)	13

6. FR series Bondply (referred to as PI with glue on both sides, containing halogen)

Product number	Adhesive ADH thickness mil(um)	PI thickness (um)	Packing specification	Application field
FR0111	1(25)	25	24in(610mm)* 250ft(76m)
FR0121	1(25)	51
FR0131	1(25)	76
FR0212	2（51）	25
FR7021	1/2（13）	1/2（13）
FR7016	1(25)	1/2（13）
FR7081	2（51）	1/2（13）
FR1515	1/2（13）	25

Application Field: Double-sided adhesive PI, Acrylic adhesive system, sealed and preserved at room temperature, applied to the inner layer of multi-layer boards and the inner layer of flexible and rigid boards, especially for the inner layer 2+2 structure, the laminated structure with etched lines on both sides, good Filling performance, optimizing the structure, while reducing the number of pressing

7.LF series Bondply (referred to as PI with glue on both sides, halogen-free)

Model	Adhesive ADH Thickness mil(um)	PI（um）	Packages	Application Field
LF0111	1(25)	25	24in(610mm)*
LF0121	1(25)	51
LF0131	1(25)	76
LF0212	2（51）	25
LF7021	1/2（13）	1/2（13）
LF7016	1(25)	1/2（13）
LF7081	2（51）	1/2（13）
LF1515	1/2（13）	25

Application Field: Double-sided adhesive PI, Acrylic adhesive system, sealed and preserved at room temperature, applied to the inner layer of multi-layer boards and the inner layer of flexible and rigid boards, especially for the inner layer 2+2 structure, the laminated structure with etched lines on both sides, good Filling performance, optimizing the structure, while reducing the number of pressing

8. HXN series ultra-thin yellow cover film Coverlay (epoxy type)

Model	Adhesive ADH Thickness mil(um)	PI（um）	Packages	Application Field
HXN0510	0.4（10）	5	250mm*200m 500mm*200m	Epoxy type ultra-thin cover film, special for LCM module, good flexibility
HXN0515	0.6(15)	5
HXN0810	0.4（10）	8
HXN0815	0.6(15)	8

Adhesive base FR (halogen)\LF (halogen free)

1.FR series single-sided plastic substrate (containing halogen)

Model	Cu OZ/ft2(um)	Adhesive （um）	PI（um）	Package	Application Field
FR9110R	1(35)	25	25	24in(610 mm)*	The industrial type has a plastic substrate on one side, and the normal working temperature can reach 140°C. It is mainly used in industrial, photoelectric, automotive, and medical
FR9120R	1(35)	25	51	36in(914 mm)
FR9130R	1(35)	25	76
FR9150R	1(35)	25	127

2. FR series double-sided adhesive substrate (containing halogen)

Model	Cu OZ/ft2(um)	Adhesive （um）	PI（um）	Package	Application Field
FR9111R	1(35)	25	25	24in(610 mm)* 36in(914 mm)
FR9121R	1(35)	25	52
FR9131R	1(35)	25	76
FR9222R	2(70)	25	127

Application Field: Double-sided adhesive substrate, working temperature up to 140°C, mainly used in industrial, optoelectronic, automotive, medical and aerospace

3.LF series single-sided plastic substrate (halogen-free)

Model	Cu OZ/ft2(um)	Adhesive （um）	PI（um）	Package	Application Field
LF9110R	1(35)	25	25	24in(610 mm)* 36in(914 mm)
LF9120R	1(35)	25	51
LF9130R	1(35)	25	76
LF9150R	1(35)	25	51

Application field: The industrial type has a plastic substrate on one side, and the normal working temperature can reach 140°C. It is mainly used in industrial, photoelectric, automotive, and medical

4.LF series double-sided adhesive substrate (halogen-free)

Model	Cu OZ/ft2(um)	Adhesive （um）	PI（um）	Package	Application Field
LF9111R	1(35)	25	25	24in(610 mm)* 36in(914 mm)
LF9121R	1(35)	25	51
LF9131R	1(35)	25	76
LF9222R	2(70)	25	51

Application Field: The industrial type has a plastic substrate on one side, and the normal working temperature can reach 140°C. It is mainly used in industrial, photoelectric, automotive, and medical

5.Glue-free substrate

Model	Cu OZ/ft2(um)	Adhesive （um）	Cu OZ/ft2(um)	Package	Application Field
AC121200EM/R	12(1/3)	12	12(1/3)	250mm*100m 500mm*100m
AC122000EM/R	12(1/3)	20	12(1/3)
AC182000EM/R	18(1/2)	20	18(1/2)
AC182500EM/R	18(1/2)	25	18(1/2)
AC181200EM/R	18(1/2)	12	18(1/2)
AC352500EY/R	35(1.0)	25	35(1.0)
AC354500EY/R	35(1.0)	45	35(1.0)

Application Field: Single-sided non-adhesive substrate for consumer electronics, applied to ordinary single-sided and multi-layer soft boards

6.AK series double-sided adhesive-free substrate (HTE copper)

Model	Cu OZ/ft2(um)	Adhesive （um）	Cu OZ/ft2(um)	Package	Application Field
AK121212EM	12(1/3)	12	12(1/3)	500mm*100m
AK121812EM	12(1/3)	18	12(1/3)
AK122512EM	12(1/3)	25	12(1/3)
AK125012EM	18(1/2)	50	18(1/2)
AK182518EM	18(1/2)	25	18(1/2)
AK185018EM	18(1/2)	50	18(1/2)

Application Field: Double-sided adhesive-free substrate for consumer electronics, high ductility electrolytic copper, applied to the inner layer of ordinary double-sided boards and rigid-flex board, with good expansion and shrinkage stability

7.AK series double-sided adhesive-free substrate (HA copper)

Model	Cu OZ/ft2(um)	Adhesive （um）	Cu OZ/ft2(um)	Package	Application Field
AK122512RY	12(1/3)	25	12(1/3)	250mm*100m 500mm*100m
AK182518RY	18(1/2)	25	18(1/2)
AK185018RY	18(1/3)	50	18(1/2)

Application Field: Double-sided adhesive-free substrate for consumer electronics, HA high ductility rolled copper, applied to the inner layer of ordinary double-sided boards and rigid-flex board, with good bending performance

8.KP series double-sided adhesive-free substrate

Model	Cu OZ/ft2(um)	Adhesive （um）	Cu OZ/ft2(um)	Package	Application Field
KP122512E	12(1/3)	25	12(1/3)	250mm*100m
500mm*100m
KP182518E	18(1/2)	25	18(1/2)	250mm*100m
500mm*100m

Application Field: LCD, LCM, TP, camera module and consumer electronics application substrate, good expansion and contraction stability, within 3%% after heat treatment in TD direction, and within 5%% in MD.

9. AP series double-sided adhesive-free substrate

Model	Cu OZ/ft2(um)	Adhesive （um）	Cu OZ/ft2(um)	Package	Application Field
AP8515R	18(1/2)	25	18(1/2)	24in(610mm)*
36in(914mm)
AP8525R	18(1/2)	51	18(1/2)	24in(610 mm)*
18in(457mm)
AP9111R	1(35)	25	1(35)	24in(610mm)*
12in(305mm)
AP9121R	1(35)	51	1(35)	12in(610mm)*
AP9131R	1(35)	76	1(35)	18in(457mm)

Application Field: Industrial double-sided non-adhesive substrate, normal working temperature can reach 180°C, transmission speed can reach about 10GHZ, mainly used in industrial, photoelectric module, automobile, medical, aerospace

10.Pyralux® JT Coverfilm and Bonding Material

Model	PI（um）	Material characteristics	Package
JT25	25	Polyamideimide material, normal working temperature can reach 150°	24in(W)*250ft
JT50	50

11. Pyralux® HT Coverfilm and Bonding Material

Model	PI（um）	Material characteristics	Package
HT0100	25	The normal working temperature can be resistant to 225°; high temperature press is required for pressing, and the temperature is above 300°	24in(W)*250ft
HT7049	38
HT0200	50
HT0300	75

12. HT series industrial high temperature resistant substrate

Model	Cu OZ/ft2(um)	Adhesive （um）	Cu OZ/ft2(um)	Package	Application Field
HT8515R	18(1/2)	25	18(1/2)	24in(610mm)*
36in(914mm)
HT8525R	18(1/2)	51	18(1/2)	24in(610mm)*
18in(457mm)
HT9111R	1(35)	25	1(35)	24in(610mm)*
12in(305mm)
HT9121R	1(35)	51	1(35)	12in(610mm)*
18in(457mm)

Application Field: Full polyimide series double-sided adhesive-free substrate, the soft board material with the highest temperature resistance today, working temperature can reach above 225°C, high bonding force, excellent insulating layer thickness uniformity and electrical properties

Halogen free PCB is a printed circuit board non-contain any halogen elements, During PCB manufacturing, the concerned halogen elements like Chlorine and Bromine do have some benefits however these do not outweigh their negative impact that can be caused in our day to day life. As a responsible PCB manufacturer, We are committed to producing circuit boards under environmentally friendly conditions

We are using following raw material to manufacture halogen free PCBs :

Halogen free PCB material, base on JPCA-ES-01-2003 standard: a copper-clad which the content of C1, Br less than 0.09%wt, it is called for halogen free PCB. (at the same time, the total value of Cr+Br ≤0.15％[1500PPM). Halogen free material: TU883, Isola DE156, Green speed series, S1165/S1165M, S0165, and so on. The EU has a strict import requirements from July 2006 ,the requirements details is the PCB products should be without halogen, mercury, hexavalent chromium, polybrominated biphenyls, polybrominated biphenyls ether .

Introduction

Halogen free printed circuit boards (PCBs) are becoming increasingly common thanks to environmental legislation and the drive for more sustainable electronics. But what exactly makes a PCB halogen free? This article provides a detailed examination of halogen free PCB materials, properties, manufacturing processes, applications, and benefits.

What is a Halogen?

Halogens are a class of reactive elements in group 17 on the periodic table. They consist of:

• Fluorine (F)
• Chlorine (Cl)
• Bromine (Br)
• Iodine (I)

These elements exhibit high reactivity and are commonly used in many chemical compounds across industries.

The Need for Halogen Free PCBs

Many traditional PCB laminate materials utilize brominated flame retardants (BFRs) to reduce flammability. However, halogens like bromine can produce toxic substances when burned. Regulatory initiatives like the Restriction of Hazardous Substances (RoHS) directive now limit halogens in electronics. Additionally, halogen free PCBs avoid corrosion issues and allow safer recycling.

Definition of Halogen Free Materials

While no universal standard exists, common criteria for halogen free materials are:

• Chlorine – < 900 ppm
• Bromine – < 900 ppm
• Total halogens – < 1500 ppm

Materials meeting these halogen limits are considered halogen free for PCB applications. Some standards require even lower concentrations.

Halogen Free Epoxy Resins

Epoxy resin is used to impregnate the glass fabric layers in FR-4 PCB laminates. Special formulations are needed for halogen free boards:

• Dicyandiamide (DCA) – Hardener that contains no halogens
• Halogen Free Flame Retardants – Replace brominated versions while maintaining fire resistance
• Modified epoxy backbone – May alter epoxy structure while keeping properties

Common halogen free epoxy resins include Tetrabrombisphenol A (TBBPA) free, epoxy phenol novolac, multifunctional epoxy, BMI, and DCA types.

Halogen Free Substrates

Popular halogen free substrate materials include:

• FR-4 – Modified bromine free version of standard FR-4 laminate
• Polyimide – Inherently halogen free polymer substrate
• I-Tera MT – Panasonic proprietary halogen free material
• RCF – Isola resin coated foil, halogen free
• BT Epoxy – Bismaleimide triazine, higher performance

Many material suppliers now offer halogen free FR-4 and other laminates to meet market needs.

Properties of Halogen Free PCB Materials

Halogen free PCB materials offer the following characteristics:

Electrical – Stable dielectric constant and low loss for high speed signals

Thermal – Withstand high temperature processes and thermal cycling

Mechanical – Good strength, durability, and drillability

Fire Resistance – Meet flammability standards without halogens

Moisture Absorption – Low moisture uptake and superior dimensional stability

Chemical Resistance – Withstand exposure to solder, acids, solvents etc.

With careful material selection, halogen free boards can match most properties of conventional PCB laminates.

Benefits of Halogen Free Materials

Halogen free PCB materials provide several benefits:

• Environmental Sustainability – Avoid toxic chemicals and byproducts
• Regulatory Compliance – Meet strict halogen bans in Europe, China etc.
• Improved Reliability – Reduce risk of corrosion and metal migration
• Easier Recycling – Less hazardous materials at end of life
• Responsible Branding – Improve public image for customers

This makes halogen free materials ideal for contemporary environmentally conscious electronics.

Challenges of Halogen Free Materials

However, halogen free materials also pose some challenges:

Cost – Halogen free resins remain more expensive than standard FR-4.

Availability – Some exotic substrate options have limited global supply.

Processes – May require adjustments to lamination cycles and drilling.

Testing – Validation required to meet halogen thresholds.

But continual progress is improving access and cost as adoption grows.

Testing for Halogens

Several analytical techniques can quantify halogen content:

• Combustion Ion Chromatography – Burns sample to free halogens for detection
• X-ray Fluorescence Spectroscopy – Use X-rays to stimulate halogen emissions
• Total Organic Halogen Analysis – Measures total organically bound halogens
• Headspace Analysis – Detects halogen gas emissions released during heating
• Wet Chemical Methods – Solution-based titration approaches

Certified third-party labs can validate halogen concentrations to guarantee compliance.

Halogen Testing Standards

Relevant industry testing standards include:

• IPC-4101 – Validates halogen content in base laminate materials
• IEC 61249-2-21 – Tests PCB laminate halogens after fabrication
• UL 746A – Determines halogens in laminate samples via combustion
• IEC 61249-2-41 – Detects total halogen content in laminate resins

Testing should be performed on both base materials and finished PCBs.

Halogen Free PCB Fabrication

Halogen free PCB manufacturing involves:

• Sourcing – Obtain certified halogen free substrate materials
• Inner Layer Processing – Standard imaging and etching
• Lamination – Adjusted temperature and pressure profiles
• Drilling – Carbide bits, optimized feeds and speeds
• Plating – Electroless copper followed by electrolytic copper
• Soldermask – Liquid photoimageable or dry film
• Finishing – HASL, immersion tin, ENIG, other surface finishes
• Testing – Validate halogen content to ppm levels

Fabrication is similar with some adaptations in processes like lamination and drilling.

Applications for Halogen Free PCBs

Halogen free PCBs are mandated or recommended for:

• Consumer Electronics – Mobile phones, laptops, wearables
• Automotive – Engine control units, infotainment, sensors
• Aerospace/Military – Avionics, guidance systems
• Medical – Implantables, imaging equipment
• Green Energy – Solar, batteries, wind turbines

Any application with flammability risks or susceptible to corrosion over long operating lifetimes.

Supply Chain Considerations

To guarantee halogen free end products:

• Material Disclosures – Require disclosures from suppliers at all tiers
• CoC Agreements – Certificate of Conformance from partners
• Incoming Testing – Spot check incoming materials
• Process Control – Prevent crossover contamination
• Documentation – Full traceability for materials and chemistry

Careful partnership with the full supply chain is key to success.

Cost Analysis

The cost premium for halogen free materials is shrinking but remains:

PCB Type	Typical Cost	Halogen Free Cost	Premium
2-4 Layer FR-4	$5-10/ft2	$7-12/ft2	~20%
6-8 Layer FR-4	$15-25/ft2	$20-35/ft2	~30%
4-6 Layer Polyimide	$40-80/ft2	$55-95/ft2	~30%

Table 1: Cost comparison of standard versus halogen free PCB materials

In high volumes, lower costs can be negotiated with laminate suppliers.

Future Outlook

Halogen free PCB adoption will increase due to:

• Tightening environmental regulations
• Push for sustainable electronics
• Growing performance of halogen free materials
• Reduced costs and expanded supply chains

Within 5-10 years halogen free PCBs could become the default for many applications.

Conclusion

Overall halogen free PCB technology enables environmentally responsible electronics with low flammability risk and improved longevity. With global momentum toward eliminating hazardous chemicals, halogen free substrates and chemistry deliver green yet high performance PCB fabrication. Thanks to extensive R&D, halogen free boards can now match most design needs at reasonable costs. Look for halogen free PCB materials to rapidly gain share across all industries in the coming decade.

FAQs

Q: What are the major benefits of halogen free PCBs?

A: Main benefits are reduced flammability, avoidance of toxic fumes when burned, reduced corrosion, and improved recyclability.

Q: What industries most need halogen free PCBs?

A: Sectors like aerospace, automotive, medical, and renewables have the greatest needs due to safety and reliability demands.

Q: How much more do halogen free PCBs cost?

A: There is typically a 20-30% cost premium for halogen free materials depending on the PCB technology.

Q: What is the most common halogen free PCB material?

A: Modified FR-4 with bromine free epoxy is the most popular thanks to its balance of cost and performance.

Q: How can you tell if a PCB is halogen free?

A: Certificates of compliance from manufacturers along with third-party halogen testing can reliably validate halogen free status.

Introduction

On printed circuit boards (PCBs), immersion tin, also referred to as white tin, is a plating finish applied to exposed copper traces, contact fingers, pads, and vias. It provides excellent solderability while avoiding issues associated with more traditional finishes. This article provides an in-depth look at immersion tin plating, its benefits and applications in PCB manufacturing.

What is Immersion Tin Plating?

Immersion tin is a direct electroless tin plating process where boards are immersed in a heated aqueous tin solution. The solution contains:

• Stannous chloride (SnCl2) – provides soluble tin ions
• Reducing agents – promote tin ion reduction
• Complexing agents – prevent tin precipitation
• pH buffers, stabilizers, and wetting agents

The PCB copper reacts with the solution, replacing copper atoms with deposited tin atoms.

Figure 1: The immersion tin chemical reaction process

The result is a thin layer of tin coating the exposed copper surfaces on the PCB without using external electrical current.

Why Use Immersion Tin?

Immersion tin offers important benefits versus other common finishes:

Excellent Solderability

The tin finish readily wets and solders just like bare copper, unlike HASL or ENIG.

No Shelf Life Concerns

The tin does not degrade or oxidize over time like silver or copper.

Eliminates Whiskering

Pure tin prevents the tin-lead whiskers caused by HASL.

RoHS Compliance

It contains no lead or other hazardous substances.

Lower Cost Than ENIG

More affordable than electroless nickel-immersion gold.

No Electrochemical Migration

Prevents copper ion leaching effects seen with OSP coating.

So immersion tin provides both superior assembly performance and reliability compared to many alternatives.

Immersion Tin Properties

Key characteristics of immersion tin deposits:

• Thickness – Typically 2-10 microinches
• Hardness – Roughly 5x harder than pure tin thanks to impurities
• Color – Matte white deposit appearance
• Bond Strength – Excellent adhesion to copper
• Deposition Rate – Up to 1 mil per hour plating rate

Thickness is well controlled by factors like plating chemistry, time, and temperature.

PCB Applications for Immersion Tin

Immersion tin is an ideal finish for many PCB applications:

• Solderable PCB Terminations – Contact fingers, pads, vias
• Wire Bonding – For wire-bonded semiconductors
• Ceramic Chip Capacitors – Compatible with inner electrode material
• Connectors – For soldered connectors and sockets
• Solar/Power Electronics – Excellent performance at high temperatures
• Hard Disk Drives – Avoid tin whiskers shorting disk platters

It serves well across consumer, automotive, telecom, industrial, and military electronics.

Immersion Tin Process Details

The immersion tin plating process consists of several steps:

Surface Preparation

• Alkaline soak cleaning
• Acid dip to remove oxides
• Water rinses

Predip

• Activates surfaces for plating adhesion

Immersion Tin Bath

• Immerse boards in 130-190°F solution for 5-60 minutes
• Deposits white tin layer

Post Treatment

• Destressing to relieve deposit stresses
• Rinsing and drying

Testing

• Thickness verification per IPC-4552
• Solderability testing if needed

The process is straightforward and does not require complex solutions like ENIG.

Shelf Life Considerations

A primary advantage of immersion tin is its stability over time:

• Tin does not oxidize significantly like copper or silver
• Maintains solderability for years if stored properly
• Shelf life of 1-2 years at room temperature
• Up to 10 years shelf life when refrigerated

This provides high confidence in maintaining solderability over the full PCB lifecycle.

Secondary Reflow Considerations

One special requirement of immersion tin is limiting secondary reflow exposure:

• High heat can cause tin to dissolve back into copper
• Should be limited to a maximum of 3 reflow cycles
• Lower peak temperatures preferred
• Manageable with process controls

So a PCB’s expected reflow profile should be considered when choosing immersion tin.

Comparison to Common Finishes

Finish	Solderability	Shelf Life	Whiskering	Cost
Immersion Tin	Excellent	Years	None	Medium
HASL	Fair	Medium	Severe	Low
ENIG	Fair	Short	None	High
OSP	Poor	Short	None	Low
Immersion Silver	Excellent	Short	None	Medium

Table 1: Comparison of immersion tin to other common PCB finishes

Immersion tin provides a cost-effective balance of performance and reliability.

Conclusion

In summary, immersion tin or white tin finish is an exceptional choice for many PCBs thanks to its outstanding solderability that persists over years, avoidance of tin whiskering, and cost-effectiveness. While secondary reflows must be controlled, immersion tin can match or exceed the benefits of costlier ENIG finish for many applications. With PCBs becoming ever smaller and more complex, immersion tin provides electronics manufacturers with a reliable surface finish option to ensure dependable solder connections over the full product lifecycle.

FAQs

Q: Does immersion tin have any shelf life?

A: Properly processed immersion tin finish has a 1-2 year shelf life at room temperature and up to 10 years when refrigerated.

Q: What color is immersion tin finish?

A: It has a matte white appearance leading to its “white tin” nickname. This contrasts with the silver color of ENIG finish.

Q: Can immersion tin withstand multiple reflow cycles?

A: It is generally recommended to be limited to no more than 2-3 reflow cycles due to heat dissolution concerns.

Q: Is immersion tin suitable for fine pitch components?

A: Yes, its excellent wetting properties make it well suited for fine pitch surface mount pads and leads.

Q: Does immersion tin contain any lead?

A: No lead is contained in immersion tin chemistry, making it RoHS compliant and environmentally safe.

Immerstion Tin PCB is printed circuit board plating tin, is different process from hot air solder leveling ( HASL ), Some engineers like to say immersion tin as white tin. Rayming manufacture immersion tin thickness 0.8-1.5μm, If you need immersion tin pcb, Pls send pcb to sales@raypcb.com .

The surface treatment immersion tin in PCB is specially designed to facilitate SMT and chip packaging processing. The tin metal plating layer is chemically deposited on the copper surface. It is an environmentally friendly process that replaces the Pb-Sn alloy plating process. It is widely used in the circuit board surface treatment process, surface treatment of hardware, decorations, etc.

Immersion tin vs. Hot air solder level-lead free (HASL-LF)

HASL-LF and immersion tin are two more commonly used surface treatment processes for printed circuit boards. However, in the printed circuit board process, immersion tin is unknown to most people, so we should clarify the similarities and differences between HASL-LF and immersion tin.

The Similarity:

HASL-LF and immersion tin are surface treatment methods to meet the requirements of lead-free soldering.

The differences:

1. Process flow

HASL-LF is pre-treatment – spraying tin – testing – molding – appearance inspection.

Immersion tin is testing – chemical treatment – tin sinking – molding – appearance inspection.

• Process principle

HASL-LF is mainly to intrude the PCB board directly into the molten tin paste. After being leveled by hot air, a dense tin layer will be formed on the copper surface of the PCB.

Immersion tin mainly uses displacement reaction to form a very thin tin layer on the PCB surface.

• Physical characteristic

The thickness of the tin layer of HASL-LF is about 1um-40um. The surface structure is dense, hard, and not easily scratched. The HASL-LF only has pure tin in the production process, so the surface is easy to clean and can be stored at normal temperature for one year. The surface discoloration problem does not easily occur during the soldering process.

The thickness of immersion tin is about 0.8um-1.2um. The surface structure is relatively loose, soft, and the surface scratches easily. Immersion tin undergoes a complex chemical reaction, so it is not easy to clean. The surface is easy residual syrup will cause discoloration during welding. The storage time is short. It can be stored for three months at normal temperature. If it stores for an extended period, the color will change.

• Appearance characteristic

HASL-LF – The surface is brighter and beautiful.

Immersion tin – The surface is light white, dull, easy to change color.

Detailed introduction of PCB immersion tin

Chemical immersion tin is a widely used PCB surface treatment process. Its working principle is to change the chemical potential of copper ions to cause the stannous ions in the plating solution to undergo a chemical substitution reaction, which is an electrochemical reaction. The reduced tin metal is deposited on the surface of the copper substrate to form a tin plating layer. The metal complex adsorbed on the immersion tin plating layer catalyzes the reduction of tin ions to metallic tin, so that the tin ions continue to be reduced to tin. The reaction equation is 2Cu+4TU+Sn2→2Cu+(TU)2+Sn.

Chemical immersion tin is a PCB copper surface treatment technology. The products of this process will neither contaminate the solder (unlike chemical nickel-gold board) nor produce an additional polyester layer on the solder mask. The method can be evenly covered with a layer of tin in any size PCB hole and the position of the connection plate. To adapt to the global strategic development, gradually realize the needs of lead-free and the development of the PCB market, use lead-free chemical precipitation. The replacement of the current hot air leveling process with tin technology has become a prerequisite for DPMC’s development plan.

The advantages immersion tin:

• Good tin surface flatness
• Has excellent electrical conductivity and solderability, can be soldered many times
• Immersion tin layer does not contain lead, no pollution to the environment
• Long storage period (one year)
• Simple process and good working environment

Compared with other surface treatment processes:

• Compared with HASL: Lead-free/smooth surface/plated layer

• Compared with immersion gold (Ni/Au): Low cost
• Compared with immersion silver: Higher oxidation resistance and better welding reliability
• Compared with OSP: Can be tinned many times

Insufficiency of immersion tin:

• Tin has low hardness and is easy to scratch
• High requirements for incoming materials (requires uniform copper surface before tin sinking, no oxidation, fingerprints, glue stains, etc.)
• Difficult to repair
• High storage and transportation requirements

The surface of the PCB must be cleaned before tin sinking. CIMAPREP PR-514 acid cleaner is a concentrated agent used to remove oil and metal oxide particles on the board. It must be diluted to achieve its cleaning effect. CIMAPREP PR- 505 is a micro etching agent that can be used directly without dilution. After micro etching, the surface will be roughened to provide a homogeneous copper surface that is good for tin sinking.

1. Immersion tin process sequence

Process No.	Cylinder No.	Process	time limit	best time	temperature	filtration
1	1	Remove oil stains	2-4min	3min	30-40℃	√
2	2,3	Two-stage washing	1-2min	2min	Room temperature
3	4	Microetching	60-90sec	60sec	Room temperature	√
4	5,6	Two-stage washing	1-2min	2min	Room temperature
5	7	Pickling	60-90sec	60sec	Room temperature
6	8,9	DI washing	60-90sec	60sec	Room temperature
7	10	Prepreg	1-3min	2min	Room temperature	√
8	11	Tin sinking	10-12min	12min	50-60℃	√
9	12	Hot DI washing	1-3min	2min	50-55℃
10	13,14	Two-stage DI washing	1-3min	2min	Room temperature
11	15,16	Hot DI washing	1-3min	2min	50-55℃

• Immersion tin process characteristics

• Bake at 155℃ for 4 hours (equivalent to storage for one year), or after 8 days of high temperature and high humidity test (45℃, relative humidity 93%), or after three reflow soldering, it still has excellent solderability.
• The tin-immersion layer is smooth, flat, and dense. It is harder to form copper-tin intermetallic compounds than tin electroplating, and there is no tin whisker.
• The thickness of the tin-immersion layer can reach 0.8-1.5μm, which can withstand the impact of multiple lead-free soldering.
• The solution is stable, the process is simple, and it can be used continuously through analysis and replenishment without changing the cylinder.

• Suitable for both vertical and horizontal processes.
• The cost of immersion tin is much lower than that of immersion nickel and gold, which is equivalent to hot air leveling(HASL).
• It has technical advantages for high-density boards that are easily short-circuited by spraying tin. It is suitable for rigid boards and flexible boards for thin-line high-density IC packaging.
• Suitable for surface mount (SMT) or press-fit (Press-fit) installation process.
• Lead-free and fluorine-free, no pollution to the environment, the waste liquid can be recycled.

• Final Surface Cleaner

• Composition:

M401 acid degreasing agent – 100ml/L

Concentrated H2SO4 – 50ml/L

DI water – the rest

Function: Remove oil stains, oxide layers, and fingerprints on the surface of the circuit board. This degreaser is compatible with all solder mask inks currently on the market.

• Operating parameters:

Temperature: 30-40°C; Best value: 35°C

Analysis frequency:

Degreaser: Once a day

Copper content: Once a day

Control system:Degreasing agent: 80-120ml/L; Best value: 100ml/L

Copper content: Less than 1.5g/L

Supplement: M401; Add 10ml/L if the content is increased by 1%

Filtering: 20μ filter element is continuously filtered, and the filter element is changed when changing the cylinder.

Life: The copper content exceeds 1.5g/L, or the processing volume per liter reaches 500 feet.

• Micro-etch

• Composition: Na2S2O4 – 120g/L H2SO4 – 40ml/L DI water – the rest

Procedure:

• Inject 85% DI water into the tank.
• Add the calculated chemically pure H2SO4 and wait for it to cool to room temperature.
• Add the calculated Na2S2O4 and stir until it is completely dissolved.
• Make up DI water to the standard position.

• Operating parameters: Temperature: Room temperature

Analysis frequency: H2S04: Once per shift

Copper content: Once a day 　micro-eclipse rate: Once a day

Control system:

Copper content is less than 50g/L

　　Micro-etch rate: 30-50μ; Best value: 40μ

Supplement: Na2S2O4: For every additional 10g/L, increase the content by 1%

H2SO4: For every additional 4ml/L, increase the content by 1%

Life: When the copper content exceeds 50g/L, dilute to 15g/L, and add Na2S2O4 and H2SO4.

• Predip

• Composition:

Prepreg M901 – 10% 

DI water – the rest

Purpose: Etch out the copper surface before tin sinking. This prepreg is not aggressive to any solder mask ink.

• Operating parameters:

Temperature: Room temperature

Analysis frequency:

Acid equivalent: Once a day

　　Copper content: Once a week

Refill: Acid equivalent Every time 100ml/LM901 is added, add 0.1 equivalent

Liquid position: Supplemented with DI water

Pass filtration: 20μ filter element continuous filtration

Life: Replace the sinking cylinder at the same time

• Wastewater treatment: After neutralization with post-treatment waste liquid, the solid matter is filtered out.

• Chemical Tin

Equipment: Both prepreg and chemical tin tanks are applicable.

Cylinder body: PP or PVC cylinder can be used.

Swing movement: The PCB frame swings in the cylinder to avoid gas agitation.

Filtration: 10μ filter element continuous filtration.

Ventilation: 15MPM ventilation is recommended.

Heater: Titanium Flon or Quartz heater.

Note: There should be no steel material in the cylinder.

• Composition:

100% Sn9O2: This tin sinking liquid is not aggressive to any solder mask ink.

• Operating parameters:

Tin concentration: 20-24g/L Best: 22g/L

Thiourea concentration: 90-110g/L Best: 100g/L

Sulfonic acid content: 90-110ml/L Best: 100ml/L

Copper ion concentration: It must be cooled and filtered when the maximum is 8g/L

Temperature: 70-75℃

Time: 10-15 minutes

Remark:

Acid Degreaser: SF          

Appearance: Colorless             

State: Liquid                 

Proportion: 1.02                  

Solubility: Completely soluble in water   

Odor: None                          

Main ingredients:                     

Methanesulfonic acid＜10~25%           

Butoxyethanol＜2.5~10%               

Water: The remaining part

Micro-etching agent: SF

Appearance: White

State: Crystal powder

Proportion: 1.35

Solubility: Completely soluble in water

Odor: None

Main ingredients:

Sodium persulfate＜50~100%

Sodium bisulfate＜10~25%

Basic agent for immersion tin: LP

Appearance: Colorless

State: Liquid

Specific gravity: 1.33g/l

Solubility: Completely soluble in water

Odor: Strong pungent

Main ingredients:

Methanesulfonic acid＜10~25%

Water: Remaining part

Basic agent for immersion tin: 2000

Appearance: Colorless

State: Liquid

Specific gravity: 1.12g/l

Solubility: Completely soluble in water

Odor: Pungent smell

Main ingredients: 

Thiourea＜10~25%

Water: Remaining part

Tin solution: SF-C

Appearance: Light yellow

State: Liquid

Specific gravity: 1.50g/l

Solubility: Completely soluble in water

Odor: Strong pungent

Main ingredients:

Tin methanesulfonate＜25~50%

Water: Remaining part

Immersion tin additive

Appearance: Colorless

State: Liquid

Specific gravity: 1.02g/l

Solubility: Completely soluble in water

Odor: Pungent smell

Main ingredients:

Methanesulfonic acid＜2.5~5%

Water: Remaining part

Immersion tin correction solution SN

Appearance: Colorless

State: Liquid

Specific gravity: 1.02g/l

Solubility: Completely soluble in water

Odor: Slightly irritating

main ingredient:

Methanesulfonic acid <5~10%

Thiourea ＜5~10%

Water: The remaining part

Immersion Tin Technical Capability

Board thickness: 20 ~ 400 mil

Board size: 3” X 6” (min) / 24” X 30” (max)

Aspect ratio: 15:1

Production capacity: 50,000 sqft/month

Tin thickness: 33.5 – 45.3 μ″

Immersion tin equipment

Vertical production line (with two cranes)

Equipment supplier: Universal (AEC)

All equipment of the liquid tank needs PP material

Swing range: 25~40MM

Swing frequency: 5~25 times/minute

Immersion Stin liquid

Manufacturer: Atotech (Germany)

Supplier: Atotech

Maintenance of tin sinking liquid:

　　The tin sinking liquid is easy to maintain, and the main components can be supplemented through analysis to keep it within the best process range:

• Each addition of 12ml/L tin sinking solution can increase the tin concentration by 1g/L, keeping the tin concentration between 20-24g/L.
• Each addition of 10ml/L 10% thiourea solution can increase thiourea by 1g/L, keeping the concentration of thiourea between 90-110g/L.
• According to the analysis value, supplement the content of organic sulfonic acid to keep it between 90-110ml/L.
• The evaporation loss can be supplemented with deionized water.

Factors affecting the rate of tin sinking:

• The influence of tin concentration: The speed of tin sinking will increase with the increase of tin concentration. The tin sink layer’s appearance does not change with the increase of tin concentration, so increasing the tin concentration effectively increases the tin sinking rate.
• The influence of the concentration of organic sulfonic acid: The rate of tin precipitation increases with the concentration of organic sulfonic acid. When the content of organic sulfonic acid exceeds 110g/L, the rate is unchanged, but when the concentration of organic sulfonic acid is lower than 50ml/L, the tin layer formed will be foggy.
• The influence of thiourea concentration: The tin deposition rate increases with the increase of thiourea concentration. When the thiourea concentration exceeds 250g/L, the appearance of the tin layer becomes rough and becomes foggy.
• The influence of temperature: In the range of 40℃ to 80℃, the tin sinking rate increases with the increase of temperature.
• Influence of time: The thickness of the tin layer increases with time, but the thickness becomes stable after 20 minutes at 60°C. Therefore, in production, choose to sink the tin at 60°C for 10-12 minutes, and a tin layer of 1.5μm thickness can be obtained.

Composition analysis:

• Analysis of tin:
• Reagents: 0.1N iodine solution, 30% sulfuric acid solution, starch solution.
• Analysis steps:
• Accurately put 2ml of solution into a 250ml flask.
• Add 15ml of 30% sulfuric acid solution.
• Add 100ml of deionized water.
• Add 2ml starch solution.
• Titrate with 0.1N standard iodine solution to the blue-purple endpoint, and record the number of milliliters V.

Calculation: Tin content Sn (Ⅱ) (g/L) = 2.69V.

• Analysis of organic sulfonic acid:
• Reagents:
• 10% Mg EDTA solution: Add 122.76g Na2EDTA 2H2O and 39.6g MgSO4 to 800ml deionized water, adjust the pH to 7 with 1N NaOH solution and then add water to 1000ml.
• Blue indicator solution or 0.1% ethanol solution.
• 0.1N standard NaOH solution.
• Analysis steps:
• Accurately put 1.0ml tin sinking solution into a 250ml flask, and add 100ml deionized water.
• Add 2ml Mg EDTA solution and 5 drops of bromophenol blue indicator solution.
• Titrate with 0.1N standard NaOH solution until the solution turns from yellow to green at the endpoint (PH 6.7), and record the number of milliliters V.

Calculation: Organic sulfonic acid (g/L) = 9.61V

• Analysis of thiourea
• Analysis steps:
• Cool the sample solution taken out of the tin sink to room temperature, and then filter to collect the filtrate.
• Pipette 2ml of filtrate accurately into a 200ml volumetric flask, add deionized water to the mark and mix.
• Accurately pipette 5ml diluent into a 1000ml volumetric flask, add deionized water to the mark and mix well (i.e., a total dilution of 20,000 times).
• Measure the extinction value of the diluted solution with a UV photometer at 236nm, 10mm quartz cuvette, and deionized water as a reference.

Calculation: thiourea (g/L) = 128 × extinction value

The thickness of tin sink is about 0.8um-1.2um. The surface structure is relatively loose, soft, and the surface scratches easily. Sinking tin undergoes a complex chemical reaction with more chemicals, so it is not easy to clean, and the surface is rough. The residual syrup will cause the problem of discoloration during welding. The storage time is short and can be stored for three months at normal temperature. The color will change if it’s stored for an extended period.

Immersion tin’s structure

Some common defects in the production process of immersion tin PCB:

1. Thin tin
2. The tin surface is dark, and the tin surface is black
3. PAD on green oil
4. The edges of the holes are black
5. Tin handprint
6. Glue stains exposed copper, green oil on PAD
7. Throwing oil and white characters
8. Tin Whisk

Immersion tin PCB usage and storage time

Two concerns:

1. The tin whisker issue.
2. Tin metal is an active metal. The tin surface is invaded by oxygen and other acidic gases after being in storage for an extended period, causing the tin surface to be oxidized or contaminated, thereby affecting the solderability.

Generally, double-sided & multi-layer immersion tin board: 6 months.

Inventory ≥ 3 months: Remove moisture from the baking sheet before going online. The temperature of the baking sheet is 120-135 ℃, time for 2-3 hours.

Inventory ≥ 6 months: Pay attention to the impact of PAD surface quality on solderability.

If it is a high TG board, it is recommended that the temperature of the baking board is about 10°C lower than the TG value.

Remarks: There will be certain risks when the oven is close to or more than one year after the oven is baked.

Each surface treatment process has its uniqueness, and the application range is not the same. Firstly, the surface of the tin sink is very flat, and the coplanarity is good. Secondly, the tin sink is lead-free, and many electronics manufacturers still prefer to choose Shen tin craft. However, Cu/Sn intermetallic compounds are easily generated during the immersion tin process, and the solderability of Cu/Sn intermetallic compounds is very poor. If the immersion tin process is used, particle size and the production of Cu/Sn intermetallic compounds must be controlled. The immersion tin particles must be small enough and non-porous. The deposition thickness of tin is not less than 40μin (1.0μm) is more reasonable. This is to provide a pure tin surface to meet the requirements of solderability.

The production of a Printed Circuit Board (PCB) involves a crucial testing phase. It is essential that every PCB undergoes thorough testing to identify and address any electrical or circuit-related problems before it leaves the manufacturing facility. Common testing methods include In-Circuit Testing (ICT), Flying Probe Testing (FPT), and 4-wire Kelvin testing (particularly for PCBs used in automotive or aerospace applications).

Among these, Flying Probe Testing (FPT) has gained significant popularity due to its high precision and numerous advantages, especially with the growing demand for compact electronic devices. Let’s delve deeper into Flying Probe Testing and explore its benefits.

What is a Flying Probe Test?

A flying probe test (FPT) is a highly flexible and precise method of testing printed circuit boards (PCBs) and printed circuit board assemblies (PCBAs). Unlike traditional bed-of-nails testing, which requires custom fixtures for each board design, flying probe testing uses mobile test probes that can move freely across the surface of the board.

These “flying” probes are controlled by high-precision motors and can access test points on the PCB with remarkable accuracy. The probes make contact with specific points on the board to perform various electrical tests, including continuity checks, short circuit detection, and component value measurements.

Flying probe testing is particularly valuable for:

1. Prototyping and small production runs
2. Testing complex or densely populated boards
3. Verifying boards with limited access to test points
4. Situations where fast setup times are crucial

The flexibility and precision of flying probe testing make it an indispensable tool in modern electronics manufacturing.

Guidelines for Test Point Design

To maximize the effectiveness of flying probe testing, it’s essential to consider several factors when designing test points on a PCB. Here are some key guidelines to keep in mind:

Accessibility to Nets

One of the primary considerations in test point design is ensuring that all critical nets are accessible to the flying probes. This involves:

1. Strategic placement of test points across the board
2. Avoiding obstruction by components or other board features
3. Considering both top and bottom sides of the PCB for optimal coverage

Designers should work closely with test engineers to identify critical nets and ensure they can be reached by the flying probes.

Features of Test Points

The physical characteristics of test points play a crucial role in the success of flying probe testing. Key features to consider include:

1. Size: Test points should be large enough for reliable probe contact but small enough to minimize board space usage. Typically, a diameter of 0.5mm to 1mm is suitable.
2. Shape: Circular test points are most common, but other shapes may be used depending on the specific requirements of the test system.
3. Surface finish: A smooth, flat surface ensures good electrical contact between the probe and the test point.
4. Solder mask clearance: Adequate clearance around the test point prevents interference with probe contact.
5. Labeling: Clear labeling of test points can facilitate easier programming and troubleshooting.

Board Clamping

Proper board clamping is crucial for accurate and reliable flying probe testing. Consider the following aspects:

1. Clamping areas: Designate specific areas on the PCB for clamping, ensuring they don’t interfere with component placement or test points.
2. Edge clearance: Maintain sufficient clearance from the board edges to accommodate clamping mechanisms.
3. Stability: Ensure the clamping method provides stable support to prevent board flexing during testing.
4. Compatibility: Consider the compatibility of the clamping method with both top and bottom side testing.

Board Dimensions

The physical dimensions of the PCB can impact the feasibility and efficiency of flying probe testing:

1. Maximum board size: Ensure the PCB dimensions are within the working area of the flying probe tester.
2. Minimum board size: Very small boards may require special fixturing or adapters.
3. Thickness: Consider the board thickness in relation to the probe travel distance and clamping mechanisms.
4. Warpage: Minimize board warpage to ensure consistent probe contact across the entire surface.

Maximum Component Height

The height of components on the PCB can affect the movement and accessibility of flying probes:

1. Probe clearance: Ensure sufficient clearance for probes to move between components.
2. Tall component placement: Consider strategic placement of tall components to minimize interference with probe movement.
3. Dual-side testing: If testing both sides of the board, consider the cumulative height of components on both sides.
4. Probe tip selection: Choose appropriate probe tips that can navigate around components of varying heights.

By carefully considering these guidelines during the design phase, engineers can significantly enhance the effectiveness and efficiency of flying probe testing.

How Does Flying Probe Testing Work?

Flying probe testing is a sophisticated process that involves several key steps. Understanding these steps can help engineers and manufacturers optimize their testing procedures and improve overall product quality.

1. Create an FPT Test Program

The first step in flying probe testing is creating a comprehensive test program. This involves:

1. Design analysis: Studying the PCB design to identify all test points and critical nets.
2. Test point mapping: Creating a precise map of all test points on the board.
3. Test sequence planning: Determining the optimal sequence of tests to maximize efficiency.
4. Probe movement optimization: Planning the most efficient path for probe movement across the board.
5. Test parameter definition: Setting appropriate voltage levels, current limits, and measurement thresholds for each test.

Creating an effective test program requires a deep understanding of both the PCB design and the capabilities of the flying probe tester.

2. Upload the Program to the FPT Tester

Once the test program is created, it needs to be uploaded to the flying probe tester. This typically involves:

1. File transfer: Securely transferring the test program files to the tester’s control system.
2. Program verification: Running checks to ensure the program is compatible with the tester’s software and hardware.
3. Calibration: Performing any necessary calibrations to ensure accurate probe positioning and measurements.
4. Test run: Conducting a trial run to verify the program’s functionality and identify any potential issues.

3. Application of Electrical and Power Test Signals

With the program in place, the flying probe tester can begin the actual testing process:

1. Board loading: The PCB is carefully loaded onto the test bed and secured.
2. Probe positioning: The flying probes move to their initial positions based on the test program.
3. Signal application: Electrical signals are applied to specific points on the board through the probes.
4. Measurements: The tester measures various electrical parameters, such as voltage, current, resistance, and capacitance.
5. Data analysis: The measured values are compared against expected values defined in the test program.
6. Fault detection: Any discrepancies are flagged as potential faults for further investigation.
7. Results logging: All test results are recorded for quality control and traceability purposes.

This process is repeated for all defined test points and sequences, providing a comprehensive evaluation of the PCB’s electrical integrity.

Why is This Type of Test Important?

Flying probe testing plays a crucial role in ensuring the quality and reliability of electronic products. Its importance stems from several key factors:

1. Flexibility: FPT can adapt to different board designs without requiring custom fixtures, making it ideal for prototyping and small production runs.
2. Precision: The high accuracy of flying probes allows for testing of densely populated boards and fine-pitch components.
3. Cost-effectiveness: For low to medium volume production, FPT can be more cost-effective than fixture-based testing methods.
4. Quick setup: The software-driven nature of FPT allows for rapid test program development and implementation.
5. Comprehensive testing: FPT can perform a wide range of electrical tests, from basic continuity checks to complex functional tests.
6. Non-destructive: Unlike some testing methods, FPT doesn’t require additional test points or modifications to the board design.
7. Early defect detection: By identifying issues early in the production process, FPT helps reduce rework costs and improve overall product quality.
8. Traceability: Detailed test results provide valuable data for quality control and continuous improvement efforts.

In an industry where product reliability is paramount and time-to-market pressures are intense, flying probe testing offers a powerful solution for ensuring electronic assemblies meet the highest standards of quality and performance.

10 Benefits of Flying Probe Testing

Flying probe testing offers numerous advantages that make it an attractive option for many electronics manufacturers. Here are ten key benefits:

1. Flexibility: FPT can easily adapt to different board designs without requiring custom fixtures, making it ideal for prototyping and small to medium production runs.
2. Cost-effectiveness: For low to medium volume production, FPT eliminates the need for expensive dedicated test fixtures, reducing overall testing costs.
3. Quick setup time: Test programs can be developed and implemented rapidly, significantly reducing time-to-market for new products.
4. High precision: Flying probes can access test points with exceptional accuracy, allowing for testing of high-density boards and fine-pitch components.
5. Comprehensive testing: FPT can perform a wide range of electrical tests, including continuity, short circuit detection, component value measurement, and functional testing.
6. Non-destructive testing: Unlike some testing methods, FPT doesn’t require additional test points or modifications to the board design, preserving the integrity of the original layout.
7. Easy program modification: Test programs can be quickly modified to accommodate design changes or to focus on specific areas of concern.
8. Reduced fixturing costs: The elimination of custom test fixtures not only reduces costs but also saves storage space and simplifies inventory management.
9. Improved fault diagnosis: The precise nature of flying probe testing allows for accurate identification and localization of faults, facilitating easier troubleshooting and repair.
10. Data collection and analysis: FPT systems typically provide detailed test results, enabling comprehensive quality control analysis and continuous improvement of manufacturing processes.

These benefits make flying probe testing an invaluable tool in the electronics manufacturing industry, particularly for companies dealing with diverse product lines or frequent design iterations.

PCB Flying Probe Test Vs. PCBA Flying Probe Test

While both PCB (Printed Circuit Board) and PCBA (Printed Circuit Board Assembly) flying probe tests use similar technology, they focus on different aspects of the manufacturing process. Understanding the differences between these two types of tests is crucial for implementing an effective quality control strategy.

PCB Flying Probe Test

PCB flying probe testing focuses on the bare board before components are mounted. Key characteristics include:

1. Test focus: Primarily tests the integrity of the PCB itself, including copper traces, vias, and pads.
2. Timing: Conducted after PCB fabrication but before component assembly.
3. Test types:
   • Continuity testing
   • Short circuit detection
   • Impedance testing
   • High-voltage isolation testing
4. Accessibility: Generally has full access to all test points on both sides of the board.
5. Speed: Typically faster than PCBA testing due to fewer obstacles and test points.
6. Fault types detected: Manufacturing defects in the PCB, such as open circuits, shorts, or incorrect impedance.

PCBA Flying Probe Test

PCBA flying probe testing is performed on assembled boards with components in place. Its characteristics include:

1. Test focus: Evaluates both the PCB and the mounted components.
2. Timing: Conducted after component assembly, often as a final quality check.
3. Test types:
   • All PCB tests
   • Component presence and orientation
   • Component value verification
   • Functional testing of active components
4. Accessibility: May have limited access to some test points due to component placement.
5. Speed: Generally slower than PCB testing due to more complex test sequences and potential obstacles.
6. Fault types detected: PCB manufacturing defects, component placement errors, faulty components, and assembly issues.

Key Differences

1. Scope: PCB testing is more limited in scope, focusing solely on board integrity, while PCBA testing provides a comprehensive evaluation of the entire assembly.
2. Complexity: PCBA testing is typically more complex due to the presence of components and the need for more sophisticated test sequences.
3. Test point access: PCB testing usually has better access to test points, while PCBA testing may require careful probe navigation around components.
4. Fault detection: PCBA testing can detect a wider range of faults, including issues related to component assembly and functionality.
5. Test program development: PCBA test programs are generally more complex and may require more time to develop and optimize.
6. Cost: PCB testing is often less expensive due to its simpler nature and faster execution.
7. Stage in manufacturing process: PCB testing occurs earlier in the process, allowing for defect detection before valuable components are added.

Both PCB and PCBA flying probe tests play crucial roles in ensuring the quality of electronic products. PCB testing helps catch defects early in the manufacturing process, potentially saving costs by preventing the assembly of components onto faulty boards. PCBA testing provides a final quality check, ensuring that the completed assembly meets all specified requirements.

In many cases, manufacturers may choose to implement both types of testing at different stages of production to maximize quality control and minimize the risk of defective products reaching the end-user.

Conclusion

Flying probe testing has established itself as a critical tool in the electronics manufacturing industry. Its flexibility, precision, and cost-effectiveness make it particularly valuable for prototyping, small to medium production runs, and testing complex or densely populated boards.

By following best practices in test point design and understanding the nuances of both PCB and PCBA flying probe testing, manufacturers can leverage this technology to improve product quality, reduce time-to-market, and enhance overall manufacturing efficiency.

As electronics continue to become more complex and miniaturized, the role of flying probe testing is likely to grow even more significant. Its ability to adapt to new designs and technologies positions it as a key player in the future of electronics quality assurance.

Whether you’re a design engineer, a quality control specialist, or a manufacturing manager, understanding the capabilities and benefits of flying probe testing can help you make informed decisions about your testing strategies and ultimately contribute to the production of higher-quality electronic products.