RAYPCB · PCB design for assembly
Design for Assembly: make the next PCB build easier to get right
PCB DFA connects component selection, footprints, placement, soldering and test access to a repeatable assembly process. Review physical access and release data before they become programming questions or first-build defects.
Preliminary designs are welcome. Identify the revision and the decision you need help with. Tools are optional; enquiry is always available.
What is PCB Design for Assembly?
PCB design for assembly (DFA) is the review of a board design, component population and production data so the intended assembly can be placed, soldered, inspected, tested and serviced using the agreed process. It starts while the layout can still change, rather than after the manufacturing files have been released.
General product DFA also addresses part count and ease of mechanical assembly. This page focuses on populated printed circuit boards. Its practical output is a set of resolved engineering decisions: which package is fitted, what the footprint represents, how the board is handled, how joints are formed and how the agreed result is verified.
PCB DFM covers the bare-board fabrication interface: copper, drilling, stackup and manufacturing data. DFA addresses the populated board. DFT asks whether the relevant faults and functions can be tested. A clean fabrication check cannot prove that the selected components fit the available assembly or rework process.
| Stage | Question to resolve | Useful output |
|---|---|---|
| Before layout freeze | Can the selected packages, density and process be supported? | Package choices, access budgets and assembly route. |
| Before ordering | Do BOM, placement, drawings and paste data describe one build? | A controlled release with open items identified. |
| At first build | Do observed results meet the agreed inspection and test requirements? | Evidence, issue disposition and approved changes for repeat builds. |
Use the right IPC document for the right decision
There is no single “IPC DFA pass” that a calculator can grant. Document the applicable revision, product class, customer requirements and any agreed exceptions. Use original standards and the exact component documentation; public tables of contents establish scope, not every licensed requirement.
| Reference | Role in an assembly review |
|---|---|
| IPC-2231 | Organizes DFX considerations, including assembly, around the product and process. |
| IPC-7352 | Generic land-pattern guidance; apply it with the exact package dimensions and project requirements. |
| IPC-7525 / IPC-7527 | Stencil design guidance and solder-paste printing requirements. |
| IPC-7093 / IPC-7095 | Process implementation guidance for bottom-termination components and BGAs. |
| J-STD-001 | Requirements for soldered electrical and electronic assemblies. |
| IPC-A-610 | Post-assembly acceptability; it is not a complete footprint-design rulebook. |
| J-STD-020 / J-STD-033 | Relevant classification and handling context for moisture/reflow-sensitive devices. |
| IPC-7711/7721 | Rework, modification and repair procedures, where applicable. |
The IPC revision table lists IPC-7351 as no longer maintained and includes IPC-7352. Record which guidance a legacy footprint used instead of silently relabeling it. Confirm the current and contractually required revisions at release; a purchasing specification should be more precise than “build to IPC.”
Component placement: protect the process envelope
Start with the manufacturer's package drawing and maximum body envelope. A land pattern, component courtyard and pick-and-place or rework access area describe different things. Two components may not collide physically yet leave too little room for the selected nozzle, soldering operation, inspection view or repair tool.
Review part-to-part, part-to-hole and part-to-edge relationships separately. Tall neighbors, connectors, shields and heatsinks can obstruct access above the board. Consider mating direction, screwdrivers, cable bend space and connector latches where these affect assembly. Do not convert a two-dimensional clearance check into a promise about three-dimensional access.
Set the rule with the intended assembly process. There is no universal spacing value that suits every component pair, machine or inspection method. If maximum envelopes already include a dimensional allowance, do not subtract that allowance again in a worst-case budget.
DFA tool 1: component-clearance budget
Use this one-dimensional model for two opposing component edges. Enter the nominal body gap, directional body allowances, placement allowances and the required remaining gap agreed for the task. The tool reports the remaining gap and margin; unknown inputs stay unknown.
DFA Component Clearance Budget
A 0.60 mm nominal gap minus 0.05 mm body allowance for each part and 0.05 mm placement allowance for each part leaves 0.40 mm. If the agreed process needs 0.50 mm, the margin is −0.10 mm. Review the layout or process; do not assume increasing placement accuracy alone resolves nozzle or rework access.
This is an illustrative tolerance budget, not a RAYPCB capability limit or an actual customer inspection result.
Footprints, polarity and component selection
Verify the full manufacturer part number against the package variant, terminal numbering and recommended land pattern. Similar names can conceal different body dimensions, exposed pads or pin assignments. Review the library origin and revision, and compare the mechanical drawing with the actual placement orientation.
Provide a clear pin-one or polarity convention in the assembly drawing. Silkscreen can support that convention, but a clipped or hidden mark should not be the sole definition. The placement rotation is meaningful only with a known CAD zero-angle convention, side convention and origin. A numeric rotation within 0–359 degrees does not prove that the component is oriented correctly.
Component sourcing is also a design decision. Confirm approved alternatives, package compatibility, availability constraints and supplied packaging. An alternative may fit electrically but require a different footprint or process. Avoid undocumented substitutions; define who can approve a change and update the controlled BOM.
Polarity and package evidence
For a component-orientation review, use the capacitor polarity evidence chain and LED terminal-to-pad mapping guide. For a package change, compare SOIC and SSOP dimensions or review the IC package family tradeoffs before approving the footprint.
Review example: a proposed replacement has the same pin count and a similar body outline. That is enough to start a comparison, but not to approve an assembly substitution. Record the full manufacturer part number and compare the actual package drawing with the released footprint.
| Question | Evidence to put beside the footprint | Decision to record |
|---|---|---|
| Which terminal is which? | Exact device datasheet, terminal numbering and symbol-pin-to-pad mapping. | Accept the mapping or correct the library; do not resolve a conflict from silkscreen alone. |
| Will the package fit? | Lead pitch, body and terminal dimensions, exposed pad where present, and recommended land pattern. | Approve the specific footprint revision or request a layout change. |
| How is it placed? | Assembly drawing, populated side and the agreed view of pin 1 or polarity. | Record the orientation reference before approving placement programming. |
For an unresolved item, send the affected reference, approved and proposed part numbers, footprint revision and a marked drawing with your enquiry. A package comparison is an input to the review, not approval of electrical equivalence.
QFN, BGA and fine pitch: connect the land pattern to soldering
Fine-pitch and bottom-terminated packages need coordinated copper, mask, paste and via decisions. A QFN exposed pad is not simply another large perimeter pad. The paste layout, thermal vias, via treatment and heat flow can interact with the joint and cleaning strategy.
The TI QFN/SON attachment report discusses package-specific attachment and exposed-pad stencil design. Use the guidance for the actual device rather than applying a single paste-coverage percentage to every QFN. Review each aperture as well as the total nominal coverage.
For a practical aperture calculation, continue to QFN stencil design and window planning. The PCB Stencil hub compares the broader tooling choices.
For BGAs, review ball pitch and package guidance, board finish, mask strategy, warpage considerations and the available inspection and rework route. Hidden joints change what an optical inspection can establish. BGA assembly process planning helps turn those requirements into an agreed build scope.
Soldering route, thermal balance and board handling
Select SMT reflow, through-hole soldering or a mixed sequence because of the product requirements. Mixing technologies is not automatically wrong; it may add process steps, support needs and inspection decisions. Review heat-sensitive parts and which components can tolerate each planned exposure.
Small two-terminal components connected to very different copper areas can heat unevenly. Investigate land-pattern symmetry, thermal paths, paste deposits, placement and the qualified thermal profile together when reviewing tombstoning or skew. A layout photograph alone cannot establish the cause of a defect.
For through-hole components, verify lead dimensions against the specified finished holes, body stand-off and access to the soldering side. Keep fixture and selective-soldering access in the review. The through-hole assembly process page covers the available process choices.
Panel rails, fiducials, tooling holes and support features should match the intended machine and fixture interfaces. Keep components and sensitive features clear of agreed clamp and depanelization zones. Board flex during separation can affect nearby parts; define the separation method before treating a board-edge gap as sufficient.
DFA tool 2: compare BOM and placement data
Some expensive first-build questions are data mismatches: a fitted reference has no coordinates, a DNP component appears in placement data, or the BOM quantity does not match its named positions. This local CSV checker makes those questions visible before programming preparation.
BOM headers: RefDes,MPN,Qty,DNP. Placement headers: RefDes,X,Y,Rotation,Side. Use mm coordinates, signed X/Y, rotation from 0 inclusive to 360 exclusive, and Top or Bottom. BOM Qty means the number of named positions in that row, including DNP positions. DNP accepts blank/no/false/0 or yes/true/1.
Grouped BOM references may use spaces, semicolons or quoted commas. Expand ranges such as R1–R4. The checker supports up to 2,000 data rows per input, 500 references per BOM row and 20,000 total BOM positions. It accepts pasted CSV, not XLSX, CAD or Gerber files.
DFA BOM and Placement Check
Example: the sample BOM marks R1, R2 and U1 as fitted and C1 as DNP. Its placement list contains R1, R2 and C1. The tool raises two questions: where is U1's placement or separate insertion instruction, and is C1 excluded from the assembly program? A DNP coordinate may be intentional; the correct response is to resolve the convention.
Use the BOM preparation guide and pick-and-place file guide to prepare the released data. Matching names does not verify package compatibility, coordinates, rotations or physical access. The report is a data-review aid, not assembly approval.
Inspection, test and rework are design inputs
Decide how critical joints can be inspected before crowding the layout. Tall parts may obstruct a camera or repair tool; bottom-terminated joints need an appropriate inspection plan. Define what AOI, X-ray or other evidence will be used for the relevant feature rather than assuming one method proves every joint.
DFT adds access for electrical and functional checks. Identify the required nets, suitable test points, fixture constraints, programming access and safe power-up sequence. Review probe access on the populated board, not only the empty PCB. A count of test points alone is not a coverage measure.
AOI, X-ray, ICT and functional test answer different questions. Agree the acceptance evidence for the first build and the repeat-production process. Preserve access for the expected rework method where repair is part of the lifecycle requirement.
Moisture, cleanliness and protection
Record any component moisture-sensitivity and handling instructions with the supplied parts. Storage, floor-life tracking and any approved drying procedure belong to the actual material and process requirements. A generic baking instruction is not appropriate for every component, packaging material or assembled board.
Consider ESD handling, contamination-sensitive interfaces and cleaning compatibility. Residue acceptability depends on the materials, process and end-use requirements; the term “no-clean” does not resolve every cleanliness question. Low stand-off areas can affect cleaning access and inspection.
If the product needs conformal coating, potting or mechanical fastening, identify keep-out regions, connectors, test points and service access before finalizing the layout. Later protection steps can remove access needed for test or repair, so put them in the manufacturing sequence and acceptance plan.
DFA release checklist
When a proposed layout or component change is intended to reduce cost, compare its recurring saving with engineering, validation and obsolete inventory in the assembly cost-reduction and break-even guide. Economic payback does not replace the DFA checks or product validation.
For quotation and release preparation, use the PCBA file-readiness checklist. If handling or separation is unresolved, the assembly panel planner and drawing guide helps define the array, rails and process questions before the layout is released.
| Review area | Evidence to release |
|---|---|
| Components and supply | Approved MPNs, package variants, supplied packaging, alternatives and substitution authority. |
| Footprints and placement | Verified land patterns, pin-one/polarity definitions, component envelopes and access requirements. |
| Paste and soldering | Released paste layers, critical stencil decisions, materials and planned soldering route. |
| Panel and handling | Delivered panel definition, tooling/rail interfaces, support and depanelization method. |
| Files and population | One revision across BOM, placement, drawings, DNP and any separate insertion instructions. |
| Inspection and test | Agreed criteria, critical joints, test/programming access, fixtures and evidence requirements. |
| Protection and lifecycle | Moisture/ESD handling, cleaning, coating keep-outs and relevant rework access. |
| Open issues and approval | Named owner, specific disposition, updated files and confirmation after re-export. |
Do not turn the checklist into a percentage that implies production approval. “Not reviewed” and “not applicable” are different states. Where evidence is missing, record the decision required and the person responsible; where a requirement is excluded, document the agreed scope.
Three engineering situations—and how to close them
| Situation | Engineering action | Evidence to retain |
|---|---|---|
| Connector blocks rework access | Review the connector envelope, tool approach and possible layout or sequence changes. | Approved access drawing and the selected rework/process method. |
| QFN paste proposal is undefined | Review the exact package, exposed-pad geometry, vias and stencil aperture proposal. | Released paste data and first-build printing/soldering observations. |
| BOM and placement disagree | Resolve DNP, missing references, revision mixing or a separate insertion route. | Consistent released files and explicit program exclusion/insertion instructions. |
These examples show a way to reason about the issue; they are not claimed customer outcomes. After a first build, use actual observations to refine the process. Keep the acceptance decision, approved changes and regenerated files together so a repeat order does not reintroduce the original question.
Send a review request tied to one build revision
Provide the BOM, placement file, assembly drawing, fabrication data and paste layers that describe the same revision. Highlight critical components and unresolved questions. Include quantity, required date, sourcing responsibility, test/programming expectations and any customer-specified standards or approval rules.
If you have not finalized all data, identify what is preliminary. A targeted question about access, package choice or soldering sequence is useful earlier than a full release. The tools can help explain a geometry budget or file inconsistency, but neither uploads your files or transfers results to Contact automatically.
RAYPCB PCB Assembly is the commercial route for the populated-board project. For ongoing production, connect the approved release to change control and repeat-build evidence. Cost discussions should separate components, setup/tooling, assembly, inspection and test; a DFA flag alone cannot predict a saving or quote.
PCB DFA questions
Is DFA the same as PCB DFM?
No. Fabrication DFM addresses how the bare board is made. DFA considers the component population and assembly route. They overlap at footprints, holes, mask and manufacturing data; both need the same controlled revision.
What is the minimum component spacing for assembly?
Use a requirement confirmed for the packages, tolerances, placement process and access task. Body collision, nozzle access, optical inspection and rework may require different envelopes. This page deliberately provides no universal IPC spacing limit.
Does IPC-A-610 tell me how to design every footprint?
It addresses assembly acceptability. Land-pattern design, package guidance, process requirements and customer criteria must also be considered. Agree the applicable document revisions and class rather than treating an acceptability document as a complete design method.
Can the online checker approve my BOM or assembly?
No. It checks the documented CSV schema and reference consistency. It cannot prove part availability, authenticity, electrical compatibility, physical placement correctness or manufacturing capability.
Are the examples from real customer builds?
The arithmetic and issue scenarios are illustrative engineering examples. The equipment and product photographs are separately identified with their sources; they are not evidence of those hypothetical findings.
What happens to pasted project data?
The dedicated tools run locally and do not upload or store the inputs. Downloaded reports remain on your device. Email opens an editable summary; attach approved files separately if you choose to send an enquiry.
Original technical references
- IPC-2231: DFX scope and table of contents
- IPC-7352: land-pattern guideline scope
- IPC: different roles of J-STD-001 and IPC-A-610
- Texas Instruments: QFN and SON PCB attachment
- Cadence: PCB DFA placement and process considerations
Use the exact component drawing and agreed process documents for the build. These public references do not replace licensed standards, product-specific qualification or engineering approval.