RAYPCB · PROCESS ENGINEERING
PCB manufacturing process: follow the board, follow the evidence
See how fabrication data becomes a tested bare board. Follow imaging, lamination, drilling, plating and final verification, with a route planner for different constructions.
Bring a drawing or an open engineering question. Tool use is optional.

What is the PCB manufacturing process?
The PCB manufacturing process converts released circuit data into a bare board with patterned conductors, insulating layers and the required interconnections. A typical multilayer rigid-board route includes engineering review, inner-layer imaging and etching, inspection, lamination, drilling, hole metallization, outer-layer patterning, solder mask, finish, legend, profiling and electrical test. The exact order depends on the construction and the qualified process. Component placement and soldering belong to PCB assembly, which starts from an accepted bare board and its own released data.
The most useful way to understand the flow is to follow both the physical board and the information controlling it. Each irreversible operation should receive the right revision, material and dimensions. Each inspection should answer a specific question before the next operation hides the feature or makes correction expensive. Counting steps alone does not tell you whether a route fits your design.
This guide owns the fabrication sequence. For board types, manufacturing scope and a quotation, use PCB manufacturing services. For deciding what evidence to request from a supplier, use the PCB manufacturer evaluation guide. You can send a preliminary drawing directly; understanding every factory operation is not a prerequisite for asking an engineering question.
For a first introduction to the physical structure, read the printed circuit board guide. If you are comparing production partners, the PCB manufacturer supplier-evaluation guide helps turn process claims into a reviewable evidence checklist.
Choose the route before following the steps
| Construction | What changes in the process | What to release first |
|---|---|---|
| Single-sided rigid | No plated layer-to-layer connection is needed unless separately specified | One copper pattern, hole types, outline and finish |
| Double-sided plated rigid | Holes connect the two copper surfaces | Finished hole requirements, plating and annular rings |
| Multilayer rigid | Inner circuits are inspected before bonding into the stack | Layer order, dielectric construction and copper schedule |
| Sequential HDI | Build-up, laser drilling and metallization may repeat | Via start/stop layers, stack architecture and fill requirements |
| Flexible or rigid-flex | Film handling, coverlay and mechanical regions change the route | Bend duty, region drawings, materials and support |
An ordinary four-layer example starts with a patterned two-sided core and adds outer copper through the agreed dielectric construction. A two-layer board may start from an already bonded copper-clad laminate and does not need that same multilayer layup. An HDI board may require several build-up stages. The number of copper layers therefore does not, by itself, identify the number of lamination cycles.
PCB process sequence
1. Review and release the fabrication data
Manufacturing begins with a coherent data package: copper artwork, drill information, a closed outline, a fabrication drawing, material requirements and the agreed quantity. Use one revision for the entire release. If the netlist, drawing and artwork disagree, the correct response is a documented engineering question, not an undocumented choice of whichever file seems newest. Mark intentional exceptions so they are not mistaken for export errors.
CAM preparation can include panel layout, tooling features, test coupons and compensation for the qualified process. These production changes are not permission to redesign the circuit. Establish which changes need approval, especially controlled-impedance widths, hole sizes, finished thickness, copper requirements and material substitutions. A customer-approved production drawing can become the reference for later inspection and repeat orders.
The PCB file-format guide explains the roles of manufacturing outputs. Ucamco's Gerber format resources are an authoritative reference for the data format itself. A valid file syntax is only the first check: a well-formed Gerber can still represent the wrong revision, a missing layer or an electrically unsuitable design.
2. Prepare and pattern the inner circuits
The fabricator identifies the laminate construction and lot, then prepares the copper surface for the selected resist and imaging method. Artwork is transferred into a resist pattern. Development exposes the copper intended for removal; controlled etching removes that copper; the temporary resist is removed as required by the route. The outcome is a conductor pattern on a dielectric core, not yet a complete multilayer board.
The conductor left after etching has a three-dimensional cross-section. Finished width, sidewall shape and copper thickness influence resistance and impedance. Copper weight and minimum spacing interact with the imaging and etching process, so a line-width limit from one construction should not be transplanted into a different heavy-copper design. The PCB etch guide explains this geometry separately.
Inner-layer optical inspection compares the manufactured pattern with the reference data and checks accessible defects before the stack is closed. Open conductors, unwanted copper bridges and registration issues have different consequences and correction options. Keep the inspection disposition with the panel identity. Once laminated, the inner pattern can no longer be directly inspected in the same way; later electrical testing complements this check rather than making it unnecessary.
3. Register, lay up and laminate the multilayer stack
Prepared cores, bonding materials and copper foils are assembled in the approved order. Core thickness, pressed dielectric thickness, foil thickness and any coating allowance must use consistent definitions. Glass style alone does not determine the final dielectric spacing. Resin content, copper distribution, material system and the qualified press cycle influence the finished construction.
The stack is registered and bonded under the appropriate heat, pressure and vacuum sequence, then cooled under controlled conditions. Surface preparation supports the required interlayer adhesion. The correct profile comes from the material system and manufacturing qualification; there is no one temperature and pressure recipe for every FR-4, polyimide or RF hybrid stack. PCB lamination covers the thickness and process-record questions in detail.
4. Drill and prepare the interconnections
Mechanical drilling creates many through holes and other machined features. Laser drilling creates selected microvia structures in a compatible build-up construction. The process must locate the opening relative to the copper layers it connects, not merely relative to the outside panel. Registration, drill wander, material behavior and dimensional changes all enter that problem.
A plated hole normally starts larger than its required finished opening because deposited copper consumes diameter. Tool size and finished-hole size are different dimensions. Non-plated mounting holes, press-fit holes and plated component holes also require different instructions. Read the PCB drilling guide before using one hole-size note for all of them.
Hole preparation removes debris and process residues and conditions the exposed surfaces for the chosen metallization system. The chemistry or plasma route must suit the laminate, reinforcement and hole geometry. MKS Atotech's desmear and metallization overview distinguishes these operations from subsequent copper build. Cleaning, activation and conductive coverage are process functions; they are not interchangeable labels for an identical bath.
5. Build copper and define the outer pattern
The initially insulating hole wall needs a conductive path before the selected electrolytic copper operation can build the required connection. A qualified route may use electroless copper or another direct-metallization system. Panel plating and pattern plating organize copper deposition differently. For that reason, a process illustration should state which route it shows instead of implying all factories perform every operation in the same order.
Outer-layer imaging, copper build, temporary etch resist and final etching interact to create the finished conductors. Surface copper and hole-wall copper are related process outcomes but separate acceptance characteristics. A good thickness reading at a wide surface pad cannot establish the minimum thickness at the center of a difficult hole. The plating PCB guide explains sampling and coverage.
At this stage the board has its conductive network, but exposed copper is not the final deliverable. Inspect the outer pattern and identify any required fill, planarization or special interconnection operation. Blind vias, buried vias, copper-filled microvias and resin-filled through holes are distinct constructions. Their presence can change earlier route choices and should already be visible in the release package.
6. Add mask, finish and useful identification
Solder mask covers selected surface regions while leaving the required pads and other features accessible. A liquid photoimageable route typically involves surface preparation, coating, drying, imaging, development and final cure in the qualified sequence. Opening dimensions and registration matter as much as color. The solder mask guide separates mask apertures from copper pads and solder-paste apertures.
The selected surface finish protects or prepares exposed metal for its intended joining or contact function. ENIG, HASL, OSP and other finishes have different characteristics and acceptance requirements. They are not substitutes for structural copper in a plated hole. Use the PCB surface-finish comparison when the joining method, flatness or storage requirement drives this decision.
Legend printing adds reference designators, polarity marks, identifiers and revision information. It must remain readable without contaminating solderable surfaces. Depending on the route, legend and finish operations may be ordered differently. The engineering requirement is the correct final condition. Silkscreen PCB covers printing; the separate layout guide addresses where those marks belong.

7. Profile, test and release the board
Routing, scoring or another agreed separation method creates the final outline or delivery array. Tooling and board support must protect features close to the edge. Panelization is part of both fabrication efficiency and the downstream assembly interface. Specify which party owns the array drawing and how rails, breakaway features and coupons are handled before shipment.
Electrical testing examines the manufactured connectivity against the chosen reference, with the agreed continuity and isolation conditions. It does not establish that the circuit design performs its intended product function. Dimensional inspection, visual acceptance, microsections, impedance coupons and other tests answer different questions. Select them from the construction and procurement requirement, not simply from an impressive list of machines.
The IPC-6012F public table of contents identifies rigid-board qualification and performance topics. Agree the applicable complete document, revision, classification and drawing exceptions in the order. This guide does not reproduce acceptance tables or declare a board compliant from a route diagram. The electrical-testing page explains what that particular evidence can establish.
Build a route-review brief
PCB fabrication route planner
The route planner asks which broad construction you intend to release and whether special interconnections are involved. It returns a readable sequence and the decisions that require confirmation. Choose a conventional double-sided board and the inner-core layup step disappears; choose a multilayer board and inner inspection and lamination appear. An HDI request adds a review for repeated build-up rather than inventing an exact cycle count from layer count.
The output is a discussion aid, not a production traveler. Actual process ordering, panel operations, subcontracted steps and inspection frequencies belong to the approved manufacturing plan. Download the brief or open an email draft, then attach drawings manually. The Contact page does not automatically receive these inputs, and the tool does not read or validate Gerber files.
What controls time, cost and a useful enquiry?
More layers, smaller holes, tighter geometry, special materials and additional build-up can add operations or narrow process margins. Yield, usable panel area, required documentation and testing also affect the quotation. A process count is therefore not a price calculator. Two boards with the same outline and layer count may require materially different manufacturing effort.
Separate initial engineering, tooling and fixtures from recurring board costs. Identify which requirements are fixed and which may change after review. If a tight tolerance exists only because a CAD default was copied, clarify that before it drives unnecessary process work. Conversely, do not relax a functional requirement merely to obtain a smaller headline price. Compare quotes against the same revision and acceptance scope.
For a first build, explain what the prototype needs to prove: fit, connectivity, impedance, assembly compatibility or environmental performance. For a repeat build, identify changes since the approved lot. A complete enquiry contains fabrication data, material and copper schedules, thickness, hole requirements, finish, quantity breaks and inspection expectations. Missing information can be marked as an open question instead of filled with a guessed value.
Material-specific routes continue in flex fabrication, rigid-flex fabrication, ceramic circuit processing and aluminum PCB manufacturing. These branches preserve the common release discipline while explaining the operations that genuinely differ.
Manufacturing-process questions
Is there one universal sequence for every PCB?
No. The board architecture and qualified manufacturing route determine the sequence. A useful flow identifies its starting material, interconnection structure and inspection gates. Treat generic step counts as explanations, not a substitute for the actual traveler and approved construction.
Does electrical testing replace optical inspection?
No. Electrical testing checks the network under specified conditions, while optical inspection can detect accessible pattern or surface issues. Some mechanical and material defects require still other methods. The acceptance plan should combine evidence appropriate to the actual risks.
Is PCB fabrication the same as PCB assembly?
Fabrication produces the bare board. Assembly adds components and joining operations, followed by the agreed inspection and functional checks. They share a release interface but require different files, process controls and quotations.
Can the route planner tell me an exact delivery date?
No. Capacity, material availability, engineering approval, process qualification and test scope all affect timing. Use the route brief to ask a more complete manufacturing question, then confirm the schedule against the final released data.
Discuss your fabrication route
Send the drawing revision, construction, quantity and the requirement that needs review. Identify any open material, geometry or acceptance question so the manufacturing response can address it.
Attach a downloaded worksheet manually. Contact does not automatically receive tool inputs. References reviewed September 2026. Schematics explain the engineering; reference photographs do not establish current equipment ownership or project qualification.