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How to Package on Package PCB Assembly

PoP Assembly: The Future

IC Package on Package is an emerging and possibly a future PCB assembly technique that can help make electronics products smaller and smarter specially portable and handheld that demands fast data connectivity and graphics display. It leads to solder components underneath other components. The two components are stacked and then soldered to a PCB. Successful experiments have been performed for PoP to stack Memory chip over mobile phone SoC (System-on-a-Chip) chip. Although, the practice was started from soldering multiple dummy components by placing and soldering component over component.   In this way a significant amount of PCB real estate can be saved to make room for other components placement and routing. Consequently, it makes to add further features in the device in a smarter package.

For example, the trend in mobile phone industry is “smaller and smarter is best”. The trend has shown that faster, smarter and lighter characteristics in data processing and multi-functional mobile devices become very popular in a very short time. For handheld devices miniaturization, to compete the fast moving market,  and fast data processing multiple techniques evolved time-to-time and are in practice such as SoC (System-on-a-Chip), PiP (Package-in-Package), SoP (System on Package),   and Package on Package.

In a mobile phone with memory chip stacked over SoC and then soldered using PoP technology makes a small area vacant. In this vacant PCB area, for example, more Memory SD cards can be added for data storage like videos or photographs, or one other IR/ CCD camera can be populated over the board,  or another ( additional to existing) SIM card may be added in future. This makes more features to be added in the same size handheld devices. PoP PCB assembly is also applied and tested successfully and adopted by leading manufacturers of smart devices in the world by the early 2000. This technology is evolving rapidly and newer technological advancements are being introduced in recent years. The latest advances are noted in bumping, stacking, and soldering techniques and technologies fields.

What is PoP PCB Assembly?

BGA Package ICs are stacked over one another and soldered to the PCB. It is explained in Fig.1., below


Figure 1: PoP ICs Stacking and Alignment for Assembly.

The PoP leads to space-saving in PCB real-estate by utilizing it in 3rd dimension. In Fig 1 this concept is depicted with two packages stacked on each other. The two BGA packages are stacked on one another. The contacts are made between top-package (Memory) to bottom package (SoC or Processor) and bottom package to bottom surface i.e., PCB solder layer. Although, the BGA Packages already have a few hundreds of small balls under their packages.

It seems quite savvy but there are significant limitations to adaptation for manufacturing, PoP assembly reliability and product durability. The PCB or product design engineers have much space to design a PoP PCB in the conventional way. They strive to produce a design within DFM (Design for Manufacturability) limits. The manufacturer faces this design to manufacture slightly tougher as more and more BGA package balls are to manufacture. The PoP PCB manufacturing and assembling technique is more prone to errors despite PCB design phase.

Figure 2: Two BGA Packaged ICs soldered by PoP Assembly method.

The Electronic components over component hide the lower component. So two BGA components become even harder to access, test and debug using conventional techniques.

PoP Assembly Method

Conventional automated assembling methods are extended to solder two vertically placed BGA ICs. It is enhanced to solder PCB surface level and then to solder upper side of Bottom BGA component. The PoP PCB assembling process can be divided into following sub-steps:

  1. The first step in PoP SMT PCB assembling technology is preparation and application of flux through PCB stencil. It ensures that applied flux is pasted over the components solderable pads or balls.
  2. Second step is to mount bottom package SoC onto the PCB.
  3. Third step is to place top package (Memory) onto the top of bottom package.
  4. Fourth step is reflow soldering of PCB such as convection reflow or Infrared reflow method. Vapor Phase Soldering method is also utilized for soldering/ assembling of PoP PCBs.
  5. On last removal of flux and reflow residuals from the PCB surfaces.

A PCB assembled through PoP assembly method is shown in Fig 3 below.

Figure 3: PoP components PCB Assembly


  • The PoP method is becoming popular in mobile phone and handheld portable all-time-connectible and high resolution graphics display devices exploiting to accommodate smartness and fastness features in future products.
  • It saves PCB real -estate to add more hardware components to the board and hence features to the device.
  • By processing and electrical point of view it provides better communication throughput between SoC/ processor and memory. The routing paths become shorter. Memory to SoC interface data bus and address bus routes length shortens. Consequently increasing inter-components data speed.
  • Better power supplies connections between SoC processor and memory.
  • Clear ownership for assembly. Bottom IC manufacturing by Logic manufacturer, top by memory manufacturer and PCB connections by OEM (Original Equipment Manufacturer).


  • The PCB routing and placement touches to tolerances limits for DFM. It causes the PCB design, manufacturing and assembling process little bit tedious.
  • Currently conventional prototype PCB Assembling infrastructure is available in market. The evolution of  assembling, soldering and testing processes and technologies may improve PoP in future.
  • Components are harder to remove and re-work. Bottom component generally hides absolutely.
  • Warpage of PCB harms PCB reliability and hence product durability i.e., life.

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