Route keepin and keepout are critical concepts in printed circuit board (PCB) design that refer to deliberately routing traces through or avoiding certain regions to meet layout guidelines and electrical requirements.
Route keepin defines areas where the PCB router must pass signal traces to force connectivity with components placed in that zone.
Route keepout conversely defines excluded regions that traces must avoid routing through to prevent interference or maintain spacing from nearby components.
Understanding keepin and keepout methodologies is essential to optimizing PCB routing and minimizing signal quality issues or fabrication defects.
Key Differences Between Route Keepin and Route Keepout
Route keepin and keepout share some similaries but have distinct definitions and implementation:
|Area where traces must pass through
|Area where traces must avoid
|Ensure trace connectivity
|Prevent signal interference
|Mandatory trace routing
|Forbidden trace routing
|Opens, disrupted connections
|Short circuits, crosstalk
Types of Route Keepin
Several key types of route keepin exist with different connectivity objectives:
Component Pin Keepin
Forces connectivity between component pins and the remainder of the circuit. Ensures no open circuits during routing.
Power Plane Thermal Connection
Stitching Vias Keepin
Makes routing pass through periodic vias to stitch together different layer planes. Maintains proper return paths.
Faraday Cage Keepin
Routes traces through shielding cages around noise sensitive circuitry to maintain isolation.
Mechanical Outline Keepin
Routes critical traces along the physical PCB extents to enable edge mount connectors.
Types of Route Keepout
Various key route keepout regions also exist:
Avoids placing traces under annotations to prevent visibility issues after fabrication.
Copper Pour Keepout
Prevents traces from entering copper fill areas to avoid accidental bridging due to etching defects.
Electrical Clearance Keepout
Ensures separation between traces and adjacent pads/traces meets target clearance rules to prevent short circuits.
Mechanical Drill Keepout
Keeps traces clearing away from mechanically drilled PCB holes to account for potential drill wandering during fabrication.
Test Points Keepout
Allows space for temporary test point accesses around points of interest for debug probing without blocking trace routability.
Implementing Keepin and Keepout in PCB Layout
PCB layout tools provide both manual and automated methods to assign route keepin and keepout:
The designer manually draws required keepin/keepout shapes and configures rules forcing or blocking traces from entering each area. Allows precision control but can be time consuming.
Software automation dynamically generates mandated trace access or exclusion areas based on placed component pin locations, pad geometry, and electrical settings like net classes. More efficient but with less customization.
Many fabricators provide standard design rule check (DRC) constraint files that designer tools leverage to auto-assign generic keepin/keepout regions. Facilitates ease-of-fabrication but with conservative assumptions.
Benefits of Implementing Thoughtful Keepin and Keepout
Intelligent use of route keepin and keepout delivers major PCB optimization including:
1. Ensures Critical Trace Connectivity
Forcing traces through certain areas guarantees nodes that must be electrically tied together connect during routing without reliance on designer effort to pre-route.
2. Reduces Signal Integrity Issues
Separating sensitive nets using pin/trace exclusion regions enables cleaner routing with less undesired coupling that degrades signal performance.
3. Optimizes Manufacturability
Guiding traces to required locations and away from high-risk zones proactively mitigates potential fabrication defects through prevention.
4. Facilitates Debugging
Strategic channel creation permits test probes access during bring-up labs while isolation barriers prevent probe grounding issues.
Impact of Keepin/Keepout Misconfiguration Hazards
While powerful capabilities, incorrect keepin/keepout implementations risk major consequences:
Excessive Route Blockage
Over-constraining areas that traces must avoid can block all viable routing paths resulting in incomplete trace connections.
Signal Performance Degradation
Allowing sensitive traces to occupy noise-coupled regions without proper isolation degrades signal spectral purity, eye diagrams, jitter, and bit error rates.
Fabrication Defect Generation
Permitting traces into zones with insufficient electrical or mechanical spacing guarantees at least localized short circuits and potential panel scrapping.
Test Access Limitations
Lack of test point regions can prevent affirming critical internal nodes leading to extensive debug efforts when integration issues emerge.
PCB Examples Using Effective Keepin and Keepout
Several case study examples highlight practical applications of intelligently leveraged keepin/keepout:
Example 1: DDR Memory Routing
DDR nets utilize pin keepin and excluded zones around vias enforcing controlled impedance paths between memory controller and modules guaranteeing timing margin.
Example 2: USB 3.0 Channel Routing
Paired differential USB traces maintain 100 ohm differential impedance routing through layer transitions using keepin while ground fills provide shielding isolation.
Example 3: BGA Fanout Routing
Dense BGA fanout traces achieve required spacing passing between bumps by assigning narrow routing channels using electrical clearance keepouts on each side.
Example 4: RF Transceiver
A transceiver utilizes perimeter stitching vias keepin combined with an interior copper pour keepout to define RF cage shielding isolating the noise-sensitive functionality.
In summary, PCB route keepin and keepout deliver necessary capabilities balancing connection enforcement versus isolation avoidance that together enable optimized layouts meeting stringent signal integrity and manufacturing compatibility needs. As PCB technologies and performance requirements scale in complexity, mastery over keepin and keepout confers a significant competitive advantage ensuring design success.
Frequently Asked Questions
What happens if too much route keepout is defined on a complex design?
Excessive keepout can overconstrain the routing problem space and block all viable connectivity paths between points that must be electrically connected. This prevents the design from being routable.
How are route keepins for differential pair routing implemented?
Differential trace pairs leverage keepins to force pairing through matched impedance paths. The keepin shapes match the spaced trace widths and are just larger than the nominal spacing gap to guarantee maintaining proper differential impedance.
Can both keepins and keepouts overlap in the same physical board area?
Yes, keepins and keepouts can coexist in certain scenarios. For example, a keepin may force a trace to route through a region but avoid encroaching on adjacent keepout zones separation sensitive circuitry nearby.
What reference design resources provide good keepin/keepout examples?
Many semiconductor vendors supply reference PCB layouts illustrating recommended keepin/keepout usage for interfaces like DDR, PCIe, USB3, HDMI, and other standards-based connectivity. These serve as excellent implementation examples.
What are some key pitfalls when validating keepin/keepout correctness?
Engineers should carefully confirm keepin/keepout rules do not overlap or contradict. Additionally, sufficient margin to facilitate fabrication tolerance and provide available space for routing is vital. Tight overconstraint frequently causes issues.