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Where does the QuickLogic Eclipse FPGA Architecture Family play a role?

What is the future of chip technology? We are at the edge of an era where a chip might have to calculate 1,000 trillion operations per second. The logic for these future chips will be fundamentally different than what is applicable in today’s mobile devices and computers. However, chips with the necessary performance may still require billions of transistors.

That is where QuickLogic’s Eclipse technology comes in. IEEE published our original breakthrough as one of “the top 10 coolest inventions of 2009”. The unique transistor structures called unibody transistors pack billions of high-performance switches into a single chip. As a result, these switches are smaller than today’s 10nm and 7nm switch transistors yet have the same functionality.

Meanwhile, QuickLogic has developed numerous innovations enabling our technology to compute at unprecedented speeds while keeping power consumption. These include eliminating the need for a special purpose “logic blocks” dedicated to specific functions like multiplying or dividing numbers. The result is a more efficient processor that uses the same number of transistors to calculate simple operations like addition and multiplication to carry out highly complex tasks.

Why would you want a computer which can do simple operations at 1,000 trillion calculations per second? For one thing, this kind of computing power will enable our devices to run real-time artificial intelligence. Additionally, we anticipate that such chips may ultimately replace today’s computers in some applications because they will easily handle data manipulation and streaming tasks.

There are also more mundane uses for such performance. To illustrate, consider the data storage problem: storing all the information on the Internet requires 5 million petabytes, roughly 5 million gigabytes. While this is a lot of data storage, using a chip to process it all in real time would save a lot of money and space.

Why is this technology essential?

Today’s chips have billions of transistors that are all physically connected. While this arrangement is suitable for how they are helpful in computers and mobile devices, it cannot be scaled to support our expanding needs’ computing power and capabilities.

Right now, many computer scientists worry that Moore’s Law may be ending, but this doesn’t mean we will stop developing new technologies because we need more performance out of our transistors. Instead, engineers like Rayming PCB & Assembly will continue to innovate. As a result, we predict that they will have developed new ways of building chips that use the same metal or silicon foundries that produce our present chips within a few years.

What are these new technologies? First, we think they will involve a nanoscale and molecular-sized architecture, as demonstrated by researchers at Harvard University and The Wyss Institute for Biologically Inspired Engineering in Boston. As a result, this architecture will enable us to pack more transistors onto the same chip, relying on devices built from single molecules instead of individual transistors.

But nanoscale innovations don’t just change how transistors are necessary. They may also change the way each transistor works. For example, recent research at IBM and The University of Texas at Austin shows that carbon nanotubes hold the promise to dramatically improve chip performance by using them in place of silicon. In addition, this can combine with many other innovations we cannot foresee today in the quest for increased computing power and capability.

In what other ways has QuickLogic innovated?

QuickLogic’s Eclipse technology depends on a manufacturing approach called silicon on insulator or SOI. This manufacturing process enables the insulation of all transistors from the chip’s silicon substrate, a significant advance that would not be possible without SOI. The result is a chip with billions of high-performance transistors built with the same materials used in today’s chips. In addition, this technology has created 3 billion transistor chips with operating speeds of 2.5 billion instructions per second. In addition, the Eclipse family includes a variety of chips with different performance characteristics and customized designs.

The company has set its sights on developing a silicon-based solution to the “big data problem.” They are using their Eclipse technology in conjunction with carbon nanotube technology which will provide a way to build systems that can process the enormous amount of data and information that is forecast to come online in the coming years.

More specifically, QuickLogic is working with partners to develop new approaches for building memory and processing capability into chip designs. Using the Eclipse architecture and carbon nanotube technology, these new components will enable higher performance and power efficiency. In addition, QuickLogic is utilizing its industry leadership in silicon on insulator capabilities to allow a new generation of products for data storage and processing.

The company’s founders, who have been focusing on transistors for the past 20 years, are now applying their skills in semiconductors to continue developing more efficient ways to manage information. As they work to advance the industry, they build an ecosystem of partners. As a result, they’re creating new products designed to meet users’ shifting needs, from mobile applications and cloud computing to the Internet of things (IoT) systems.

Where does the QuickLogic Eclipse Family play a role?

QuickLogic has designed and delivered chips that use our Eclipse technology to date. So, these chips have been used in more than 60 products, from high-end computer servers to embedded systems for applications like military drones and industrial equipment.

As we look to the future, their goals are to develop new Eclipse technology with higher performance, which will require more innovative transistor designs. Additionally, they have also built a broad ecosystem with partners working with us to develop next-generation computing solutions, including communications and consumer electronics companies. Since the company’s founding ten years ago, QuickLogic has been a pioneer in developing new kinds of chips, which will be essential for the future of computing.

Some of the areas they play in are:

1. Channel coding:

This application uses a chip’s processing capability to do streaming and data manipulation, including tuning TV signals. So, the QuickLogic Eclipse device is a unique product that enables this with the Eclipse architecture.

2. Speech/voice processing:

The Eclipse device, specifically the custom architecture optimized for this application, provides a high-performance voice and speech processing solution.

3. Networking/communications for VoIP:

QuickLogic has developed a unique custom architecture specifically designed for this application. As a result, it provides high performance for real-time network processing and low power consumption.

4. Signal processing functions:

Functions such as processing of digital TV signals, and satellite transponder processing for PSK and DVBS2 modulations, can be implemented on a device based on the Eclipse technology. So, this provides high performance at very low power consumption.

5.   Signal processing operators:

This function can help perform analog to digital conversion and modulating/demodulating operations. This is another application with high performance, low power consumption, and high bandwidth requirements.

Eclipse Family technical features

The QuickLogic Eclipse family of products provides a set of technical features for any class of applications, including:

“Eclipse Core” is a processor that can do data processing, image processing, and graphics operations at a much higher speed than previous solutions. It is particularly good at digital signal processing (DSP) and analog to digital/digital to analog conversion. As a result, it is a custom architected processor implemented using only silicon on insulator technology, called SOI. The result is a powerful performance, processing speed, and power efficiency.

 “Eclipse Core Plus” This processor provides the same high DSP capabilities as the Eclipse Core and is also optimized for I/O functions. This includes video, graphics, audio processing, and communication functions.

 “Eclipse Edge” is an entry-level processor designed for real-time networking applications and digital TV operation. So, it provides low power consumption, high speed, and low cost but limited DSP capabilities. Applications for Eclipse Edge include mobile communications, digital TV, and digital video recording.

 “Eclipse CXM815” The Eclipse CXM815 is a high-performance chip that provides the same capabilities as the Eclipse Edge but with higher processing capability. It is suitable for broadcast transponder processing and other low IP, high frame rate video and graphics services.

 “Eclipse Tensor” The Eclipse Tensor is a separate processor that provides high performance, as well as a set of real-time stream data functions, such as video decoding. Also, it includes Kepler architecture graphics processing units (GPUs). This is an enabling technology for new product development in graphics processors and applications. The result is approximately 1/4 the power consumption compared to desktop GPUs.

Features

1. Advanced Clock Network

This is a flexible, networked architecture that includes fully programmable clocks. The resulting system has minimal jitter, lower power consumption, and reduced system cost. The clock network is suitable for high performance, flexibility, and low power consumption. It provides custom clocks in addition to a global clock.

The global clock Key attributed include:

a) Twenty quad net networks: These are fully programmable and can be helpful for system synchronization. They can also be beneficial for shifting data between processing elements. The result is the ability to create a system that features asynchronous or synchronous operation and a system that can run in low power mode.

b) Sixteen I/O networks: These are fully programmable and able to drive I/O in wideband as well as high speed, low power modes. The result is that the system is suitable for I/O needs in different modes.

c)  Nine global clock networks: These are fully programmable and can be used for synchronous processing, shifting data between elements, and other functions. The result is a flexible, powerful architecture that can handle various applications. 8 are programmable, while the ninth is helpful as a dedicated clock for the QuickLogic core.

2. Programmable I/O

The QuickLogic Eclipse is a multistandard standard-compliant I/O platform. It supports a wide range of I/O standards and can be customized to support additional standards. The I/O architecture allows the system to be helpful in various applications, including digital video and graphics, and computer peripherals. A total of 32 programmable I/O pins are part of the Eclipse device. These can be configured for specific tasks or tailored for special needs.

Key features include:

a) Three register configurations: There are three register configurations for I/O: input, output, and output enable. These control signal processing units (SPUs) provide a flexible interface for further signal processing functions. For example, multiple SPUs can perform digital to analog conversion or digital video compression.

b)  Eight independent I/O banks: Four 16bit banks can be helpful for I/O data and one 8bit bank for register configuration. The result is a flexible architecture that can handle a wide range of I/O standards.

c) SSTL3, SSTL2, GTL+, PCI, LVCMOS, and LVTTL: Key features include:

 An 8bit LVTTL port that supports data rate up to 400 Mbit/s. This fully programmable port can be helpful for I/O data and program registers.

 A 32bit LVCMOS (Low Voltage Differential Signal) Port can be helpful for analog I/O with a maximum current capacity of 750 mA per bit.

 A 32bit PCI Express bus that can be helpful for I/O operations and data path and processing operations.

A PCI Express x2 low power mode with a maximum 4 Gbit/s

An 8bit SSTL3 port supports data rates up to 400 Mbit/s, minus the differential loss of 1.1 dB. This is suitable for digital I/O and program and data registers.

d)  Programmable slew rate control: This allows the system to help in a wide range of modes. The result is suitable for input and output requirements and processing needs.

e)  High performance: <3.2 ns Tco: The system features a low-power mode designed for low-cost, low-speed applications, but with high performance. The result is a solution that we can use for various I/O needs, including digital video and graphics processing and I/O. In addition, the platform supports multiple clock speeds of up to 64 MHz.

3. Embedded Dual Port SRAM

EMR (Embedded Memory Reliability) is an industry-first built-in programmable dual-port SRAM that can help as a scratchpad memory or an extra bit of memory in applications. The added flexibility allows the QuickLogic Eclipse to suit special I/O needs, such as digital video processing, graphics, and computer peripherals. In addition, the two-port SRAM is on the same chip with other components.

Key features include:

a)  Configurable and cascadable: This means that it can be configured as a scratchpad memory and reprogrammed as an extra bit of memory. This makes it suitable for graphics purposes or graphics-related operations such as video compression.

b)  FIFO/ROM/RAM Wizard for automatic configuration: The Eclipse code generator works with a Wizard to automatically generate the configuration code, reducing the amount of engineering work needed.

c) 82,900 RAM bits: This is a highly configurable, programmable, and reliable SRAM essential for data storage, embedded memories, scratchpad memories, or an extra bit of memory.

d) Thirty-six 2,304bit dual-port SRAM blocks: The dual-port SRAM is available in 2,847 bits or 4,608 bits blocks. When clustered together, they form a 32bit address space.

4. Flexible Programmable Logic

The Eclipse includes a powerful programmable logic array (PLA) that is fully programmable to optimize the system for different applications. The PLA benefits general-purpose logic, data processing, and data storage. The result is a complete system that can change for various uses based on the application’s needs. In addition, the Eclipse includes 32Kb of PLA memory. This can help in general-purpose logic, such as highspeed digital signal processing, intermediate processing, or data storage. In addition, we can use it in place of other logic modules, such as a DSP core.

Key features include:

a) 347 I/O: This is a highly configurable, programmable, and reliable PLA that we can use for data processing, embedded memories, or an extra bit of memory. In addition, we can use it to implement data processing, graphics processing, or computer peripherals. The result is that we can change it for various embedded systems with different requirements.

b)  583,000 max system gates: The Eclipse can be used in many applications and tailored for specific requirements. The result is that the system will be suitable for different applications.

c) 4032 logic cells: This is a highly configurable, programmable, and reliable PLA that can help in data processing, embedded memories, or an extra bit of memory. In addition, we can use it to implement data processing, graphics processing, or computer peripherals.

d) 2.5/3.3 V dive, 2.5 V Vcc capable I/O: The Eclipse can be used in a wide range of applications and suit specific requirements. The result is that the system can be suitable for different applications. Multiple configuration options allow the Eclipse to be ideal for many embedded applications. In addition to hardware-based I/O, the hardware-based security module (HSM) makes it easy to add security capabilities that are flexible and scalable.

e)  5 layer metal CMOS process: This flexible and highly configurable integrated circuit is suitable for different applications and the end user’s requirements. 0.25 µm process technology provides the maximum capability for high speed and low power.

How to obtain software development tools for the QuickLogic eclipse FPGA platform

The QuickLogic Eclipse FPGA platform depends on several tools and development platforms.

Eclipse IDE for different operating systems: This includes Windows, Linux, and Mac OS X. It supports the existing Eclipse opensource community and IDEs such as Eclipse CDT, Eclipse Pydev, and the SystemC development environment. This helps to lower upfront design costs by reusing existing tools.

Eclipse modules (EM): This is a set of open-source software and libraries that add functionality to the Eclipse IDE.

The core module libraries include:

1. FPGA programming framework: Supports the programmable logic, memory, and I/O. It has integrated I/O, DSP, debugging, and high-speed data transfer for efficient processing. The programming interface for the FPGA is in hardware description language (HDL). It runs on Windows, Linux, or Mac OS X.

2. VHDL and SystemC: Uses high-level language (VHDL and SystemC) for developing FPGA applications. It supports all the FPGA-based components of the Eclipse IDE. In addition, it enables the use of mainstream design methodologies, such as functional partitioning, architecture-based design flow, high-level synthesis, and model-based design flow with simulation acceleration.

3. Memory: Supports various memory blocks, including direct embedded memory, dual-port memory, and embedded dual-port SRAM (EMR).

4. Customizable IPs: Block diagram components and other building blocks can implement the desired design.

5. Debugging: Debugger for HDL code (Verilog or VHDL) and full-featured GDB server. The commercially licensed version of the Eclipse IDE with all features enabled. This includes the full Eclipse CDT development environment, debugger, Designer, and EM modules.

How to obtain hardware development tools for the QuickLogic eclipse FPGA platform

As well as using off-the-shelf FPGA development tools, we can configure the QuickLogic Eclipse FPGA platform to work with commercial integrated circuits (ICs).

The core module libraries include:

1. Numberic coprocessors: The numeric coprocessor modules support different types of numeric coprocessors, including floating-point arithmetic and fixed-point arithmetic. These modules can help to add math coprocessor functionality to the Eclipse Platform.

2. Serial interfaces: The EM core library includes four serial interface modules (called Seals). The UART Seal, the SPI Seal, the I2C Seal, and the CAN Seal. These add support for different types of serial interfaces to an Eclipse Platform.

3. I/O: The general purpose I/O module can help all types of peripheral functions, including interrupts, DMA, power management, and timers.

4. DSP cores: A fully configurable and customizable signal processing core used for audio processing or imaging applications.

 5. Video processors: A fully configurable and customizable video processing core that can be used for video processing or augmented reality applications

 6. Security modules: The FPGA security module supports various application programming interfaces (APIs) that can be helpful to create secure applications. It also includes Hardware Security Modules (HSM), which provide hardware-based encryption, decryption, and authentication.

7. Customizable IPs are components and building blocks for creating the desired design.

8. Highspeed embedded memory: The QuickLogic Eclipse FPGA platform includes a high-speed, high-capacity embedded memory module with many embedded DRAM and SRAM.

9. Highspeed clock generators: The QuickLogic Eclipse FPGA platform includes two highspeed clock generators that we can use for operating systems, communications, and graphics processing

10. Flash memory: The QuickLogic Eclipse FPGA platform includes a microcontroller-based flash memory module for storing nonvolatile data. This is an embedded flash memory module with fast access times.

QuickLogic eclipse FPGA devices

QL6600ESPB516C, QL63254PT280I, QL66006PS484C, QL63254PT280C, QL66006PB516C, QL63254PS484C, QL66004PB516C, QL6250PQ208I, QL65007PB516C, QL6250PQ208C, QL65006PT280C, QL6250E6PS484I, QL65006PB516I, QL62507PQ208C, QL65004PS484C, QL62506PQ208C, QL65001PF100I, QL62506PB516C, QL6325GPS484C, QL62504PT280C4907, QL6325ESPQ208C, QL62504PS484C, QL6325EESPT280C, QL62504PQ208M, QL6325EESPS484C, QL62504PQ208C4626, QL6325E7PQ208C, QL62504PQ208C4464LA, QL6325E6PQ208C, QL62504PQ208C446, QL63256PS484C, QL62504PQ208C

QuickLogic Eclipse FPGA devices price fluctuation frequency

The price of QuickLogic Eclipse FPGA devices depends on the quantity manufactured and the market demand for that part. The price is stable and not subject to frequent changes. However, the price may vary by ±10% over time.

Is there a minimum and maximum order quantity?

The minimum order quantity is typical $20K to $50K, depending on the device. The maximum quantity of an order is typically based on the factory capacity for that device and may be as high as several hundred thousand parts.

Conclusion

in conclusion, the QuickLogic Eclipse FPGA platform provides a complete set of semiconductor intellectual property (IP) and a high-level programming environment for FPGAs. The QuickLogic Eclipse FPGA platform is ideally suited for applications ranging from networking to multimedia, from industrial control to test equipment, and automotive, medical, and security applications.

The Eclipse Platform provides built-in support for embedded memory, serial interfaces (SPI, I2C, and UART), DMA controllers, and flash memory. The Eclipse Platform enables the use of a wide range of readily available integrated circuits (ICs) as programmable hardware peripherals. The QuickLogic Eclipse FPGA platform is well suited to applications ranging from networking to multimedia, from industrial control to test equipment, and automotive, medical, and security applications.

It has become increasingly popular for companies to develop their IP in-house, supplied by the open-source community. One of the critical initiatives to produce IP cores in-house is to control the entire design process better. QLogic’s IP solution fully controls the design flow from specification, simulation, and synthesis through final implementation.

 

 

 

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