With the sale of Xilinx to AMD and Altera to Intel, the FPGA chip market is competitive. That said, the market has not seen any noteworthy advancements in what is already emerging as the new standard FPGA’s for high-performance computing and embedded systems. With these new alterations to the field, it seems that Achronix is stepping into an area where they can make some noise.
Unlike the other two market leaders, Achronix is a private company. This provides them with more freedom in their operations involving new ideas and technologies than the publicly traded Xilinx and Altera. While this may not be a significant advantage in the short run, since Xilinx and Altera have very strong in-house engineering teams, it can be invaluable if they want to take the lead in FPGAs.
This is especially true because of the new advancements that Achronix has made. The new developments by Achronix will allow FPGAs to help in real-time applications instead of having to have already acquired the data before running algorithms through the FPGA. This is huge news, considering that this was impossible with any FPGA only a few years ago. Since then, however, Achronix has produced several unnamed high-end clients willing to use their technology in real-time applications.
Speedster FPGA Family
The Speedster FPGA chips have become the standard technology Achronix uses to power its customers. They can run at a speed of up to 6 billion cycles per second, more than double the speed of their older competitors, the Virtex and Cyclone series by Xilinx. However, despite this extreme increase in speed, Achronix has maintained power consumption levels similar or slightly lower than their main competitors.
The Virtex-4 with the Achronix Speedster technology can run at a speed of up to 6 billion cycles. It is over twice as fast as its predecessor. Despite this, however, it consumes less power than its previous model, the Virtex-4. This leads to more efficient systems when compared to the Virtex-4. It can also use a higher level of integration, which results in lower costs and less space required.
While this may not seem groundbreaking at first glance, the implications are huge. FPGAs can now help in real-time applications, such as signal processing or control systems. Until now, FPGA’s can pre-process data and run algorithms on them later. This was because FPGA’s could not efficiently handle real-time data.
Unlike the Virtex series by Xilinx, Achronix has introduced 64-bit architecture into its chips. This allows for more programming possibilities than the previous generation of FPGAs. In addition, Achronix has made several upgrades that will allow the system designer the freedom to create more advanced applications without thinking twice about how many resources they would use.
1. Unprecedented FPGA Performance
Xilinx’s current FPGA, the Virtex-5, has a maximum frequency of one gigahertz. While this is a considerable jump over its previous iterations, Achronix has made an even greater jump. The Speedster family has an unprecedented maximum frequency of six gigahertz. This is over twice as fast as Xilinx’s design.
2. Massive System Integration
The Speedster FPGA family allows for a massive level of system integration. For example, the Virtex family from Xilinx only used 15 I/O’s per device. On the other hand, the Speedster family has 80 I/O’s per device. It is almost three times as much as the previous design. This makes it more useful in several applications where we need to handle a large amount of data or have more channels available than ever before.
3. High-Speed Interfaces
The Speedster family has many high-speed interfaces. It has a 64bit wide memory interface as well as differential I/O rates. Coupled with the higher level of integration, this makes the Speedster family more cost-effective and more efficient than its predecessors.
This allows customers to run their applications in real-time, making it an excellent option for signal processing in control systems or communications systems. In addition, the high levels of integration and large memory space allow for more data processing at once and faster.
One of the biggest problems with the FPGAs currently available is that they are entirely reliant on external components to work, such as RAM or ROM. This limits flexibility. It makes it hard to use them efficiently in applications where we need to input large amounts of data.
This has been greatly improved upon in the Virtex-4 by Xilinx and the Speedster family by Achronix.
4. Design Methodology
Rayming PCB & Assembly designed the Virtex series using a design methodology called deep embedding. Achronix has used this process in their newer generations of FPGAs. The deep embedding allows for optimal use of the chip. In addition, the technology can integrate it into equipment and allow its alteration to fit the needs of new designs.
They designed the Speedster family of FPGAs using System-on-Chip (SoC). As a result, the speedster family allows for the placement of these chips onto the motherboard. This eliminates the need for extra space and makes it easier to use.
This is particularly important in applications that require manipulating a large amount of data. For example, the Virtex and Cyclone series from Xilinx only had 32Kbytes of memory. As a result, it isn’t easy to use them efficiently in applications. We need a large amount of information for users who want to use the FPGA for many purposes.
5. Trading Performance for Power
The Speedster family of FPGAs, while running at a higher frequency than its predecessors, still uses less power. This is particularly important in applications where we need a large amount of processing power. It makes it easy for customers to use their FPGAs in multiple projects without worrying how the device would use much extra power.
The Speedster7t FPGA family is best for real-time signal processing, control systems, and communications. The Speedster7t family implements a 64-bit wide memory interface and provides USB Host/Device support. In addition, the PowerQUICC II™ II core validates the Speedster7t family and supports high-performance hardware accelerators such as the ARM Mali™ V2DAC.
1. Machine Learning Processors
The Speedster family supports the Intel® MKL™, Nvidia® CUDA™, and CuDNN libraries. The PowerQUICC II™ II FPGA cores can run optimally with these libraries. This allows users to take advantage of the power of real-time data processing. They do this in situations where we are using massive amounts of data. In addition, it has a Fully fracturable integer multiplier/accumulator unit. This allows for quick access and more efficient execution of floating-point calculations.
2. High-Speed Interfaces
The Speedster7t has a host of high-speed interfaces. It has a 64-bit wide memory interface as well as differential I/O rates. Coupled with these features, it creates more advanced applications without limiting their flexibility. The device also has a 12 bit ADC with up to 128 SAR channels. It also has up to four Ultra High-Speed transceivers.
These are high-speed serial interfaces that have 40 Gb/s of bandwidth available. The PCIe Gen5 (x8) interface is fully supported with a 100 Gb/s lane rate and provides a host of other high-speed interfaces as well. In addition, its GDDR6 memory interface provides up to 112 Gb/s with a bandwidth of 12.4 GB/s. It is over three times that of traditional GDDR5.
3. 2D Network on Chip (2D NoC)
Like the Virtex and Cyclone series of FPGAs from Xilinx, the Speedster7t FPGA allows designers to build systems on a chip with relative ease. This is due to its 2D NoC system, which performs high-speed serial interconnects. This feature allows users to integrate their applications.
It reduces routing congestion which lowers the latency. The 2D NoC also provides optimized interconnect designs that provide high-speed data transfer between circuits or components on the chip.
With the 2D NoC, it is easy to route the data and minimize any routing congestion. However, it still allows for complex computations to be processed similarly to its predecessor devices.
Application for Speedster7t FPGAs
Speedster7t FPGAs can accelerate both batch and streaming data processing tasks such as video transcoding, image recognition, robotics control, and image processing. We can code the most complex algorithms used in these applications on the FPGA without impacting the programmable logic usage.
Speedster7t FPGAs can be helpful for high-performance networking appliances with the Gigabit Ethernet and PCIe 5 protocols. The high-speed networking interfaces in Speedster7t FPGAs reduce latency and improve throughput for on-chip communication.
Speedster7t FPGAs can be helpful for AI and Machine Learning by implementing high-performance neural network accelerators like TensorFlow. The powerful 2D NoC implementation in Speedster7t makes it easy to deliver high-performance AI/ML systems on a single chip.
Test and Measurement:
Speedster7t FPGAs can be helpful for test and measurement applications, e.g., radar signal processing in FPGAs. Test and Measurement applications are high-performance compute-intensive data processing applications requiring fast data access at high speeds with minimal latency.
Speedster7t FPGAs are ideal for on-chip computation and data storage requiring fast access. The high-speed serial interfaces allow users to have fast access times to the memory and data, which results in excellent throughput for large amounts of data.
The Speedster7t FPGA is an excellent solution for building 5G infrastructure. It has more than enough bandwidth to meet the requirements of 5G. It also allows for implementing high-performance AI and Machine Learning applications on the same device.
Speedster7t Products and features
Part Number AC7t800
12 2D NoC bandwidth (Tbps), Ethernet (8 lanes – 2×400G or 8×100G), One ×16 PCI Express Gen5, 6 GDDR6(2) High-bandwidth memory channels, DDR5×64(1) DDR4/5, 24 SerDes 112G, 6.9 ML TOps: int8 or block bfloat16, 85 Mb Memory, 1,152 BRAM (72 kb), 288 LRAM (2kb), 288 MLP blocks, 380K 6-input LUTs
Part Number AC7t850
12 2D NoC bandwidth (Tbps), Ethernet (8 lanes – 2×400G or 8×100G), One ×16 PCI Express Gen5, 6 GDDR6(2) High-bandwidth memory channels, DDR5×64(1) DDR4/5, 24 SerDes 112G, 6.9 ML TOps: int8 or block bfloat16, 85 Mb Memory, 1,152 BRAM (72 kb), 288 LRAM (2kb), 288 MLP blocks, Inline cryptography, 334K 6-input LUTs
Part Number AC7t1500
20 2D NoC bandwidth (Tbps), Ethernet (16 lanes – 4×400G or 16×100G), One ×8, one ×16 PCI Express Gen5, 16 GDDR6(3) High-bandwidth memory channels, 1 DDR4×64 DDR4/5, 32 SerDes 112G, 61 ML TOps: int8 or block bfloat16, 195 Mb Memory, 2,560 BRAM (72 kb), 2,560 LRAM (2kb), 2,560 MLP blocks, 692K 6-input LUTs
Part Number AC7t1550
20 2D NoC bandwidth (Tbps), Ethernet (16 lanes – 4×400G or 16×100G), One ×8, one ×16 PCI Express Gen5, 16 GDDR6(3) High-bandwidth memory channels, 1 DDR4×64 DDR4/5, 32 SerDes 112G, 61 ML TOps: int8 or block bfloat16, 195 Mb Memory, 2,560 BRAM (72 kb), 2,560 LRAM (2kb), 2,560 MLP blocks, Inline cryptography, 646K 6-input LUTs
Part Number AC7t3000
24 2D NoC bandwidth (Tbps), Ethernet (16 lanes – 2×800G, 4×400G or 16×100G), Two ×16 with CXL PCI Express Gen5, 16 GDDR6(4) High-bandwidth memory channels, 2 DDR5×64(1) DDR4/5 48 SerDes 112G, 30 ML TOps: int8 or block bfloat16, 192 Mb Memory, 2,6000 BRAM (72 kb), 5,000 LRAM (2kb), 880 MLP blocks, Inline cryptography, 1300K 6-input LUTs
Part Number AC7t6000
48 2D NoC bandwidth (Tbps), Ethernet (32 lanes – 4×800G, 8×400G or 32×100G), Two ×16 with CXL PCI Express Gen5, 16 GDDR6(4) High-bandwidth memory channels, 4 DDR5×64(1) DDR4/5, 64 SerDes 112G, 61 ML TOps: int8 or block bfloat16, 384 Mb Memory, 5,200 BRAM (72 kb), 10,000 LRAM (2kb), 1,760 MLP blocks, Inline cryptography, 2600K 6-input LUTs
Achronix Speedster22i HD
The Speedster22i HD is a high-performance memory subsystem for embedded applications. It combines the speed, flexibility, and performance of the Virtex™Scale-2™ FPGA and DDR4. It implements up to 12 PCIe Gen3 lanes with one supporting DDR4 compliant memory speeds up to 2666 MT/s. These devices run at a maximum rate of 750 MHz. It also provides optimum flexibility in each system’s packaging options. It also has a host of high-speed interfaces, including up to 40 Gb/s for Gigabit Ethernet and PCIe Gen5. This makes it an excellent platform for high-performance I/O and computing applications.
The Speedster22i features a 1066 Mbps DDR4 interface, providing up to 3.2 GB/s of memory bandwidth at the highest data rates. In addition, it uses the Xilinx CoreGen All Programmable technology and can achieve high-speed I/O data rates with low latency and improved performance over previous Virtex FPGAs. It also has an optional built-in boot ROM for applications that may require it.
The Speedster22i HD has a 16-lane interface with high bandwidth, low latency, and low power consumption. It has eight lanes for PCIe Gen3 and six lanes for Gigabit Ethernet. The remaining three lanes can add advanced PCIe Gen5 or PCIe Gen5 OTG. It also has an optional SAS 6G link to enable advanced storage solutions.
The Speedster22i HD’s high-speed interfaces provide easy design of high-performance applications such as video and image processing, radar, traffic control, robotic automation, and autopilots. In addition, the wide array of connectors makes it ideal for use with a wide range of devices, including robotics, aerospace, defense, and automotive.
The Reconfigurable Logic Block (RLB)
The Reconfigurable Logic Block (RLB) is a small but powerful add-on to the Speedster22i HD FPGA core. It is cost-effective to bring an additional 200 to 400 Gb/s of parallel FPGA logic in a compact, 2U form factor, with programmable features and reduced latency. The RLB can be used independently or as part of a larger system.
Efficient RLB Feedback:
The RLB is easy to use and allows designers to quickly integrate their products on the FPGA platform with little effort. The RLB also provides high throughput at low latency and runs at a maximum frequency of 750 MHz. It also has a built-in clock manager that helps reduce the number of routing resources required, thus making it easier to integrate into any system design.
The Light Logic Cluster:
The RLB provides a small but powerful logic cluster that allows users to design and implement custom logic functions for the FPGA. The Light Logic Cluster consists of two Arria 10 GX DSPs, two Seti FPGA processors, and a bitstream synthesizer. The processors are connected via an Arria 10 GX fabric to an optically linked I/O system to provide high bandwidth and low latency.
The Heavy Logic Cluster:
It adds more processing power to the RLB. The Heavy logic Cluster supports additional Arria 10 GX DSPs and FPGAs. It also features high-speed SerDes ports used for communication between the processors and FPGAs. This heavy cluster comes in a single slot configuration and allows designers to implement any Light Logic Cluster functions while also providing more complex processing capabilities.
1. Block RAMs (BRAM)
BRAMs are an architecture for memory resources on Xilinx FPGAs. It uses a four-stage pipeline interconnect and can deliver a 2 gigabytes per second link speed. With each stage having a 128-bit wide buffer, the BRAM can achieve up to 1 gigabyte per second bandwidth at high clock rates. The BRAM also has three read-only DRAM ports to mirror internal memory resources.
Organization: The BRAM stands in a 3 x 2 block that allows for simultaneous read and writes operations, with the read operations taking precedence over the write operations. It also has a prefetch mechanism that allows efficient operation at higher clock rates. The BRAM contains multiplexers that select the direction of data flow. A set of 3 read ports read from the internal memory resources, while the second set of 2 write ports writes to the internal memory resources
Built-in FIFO Controller: The BRAM also contains a configurable FIFO controller with a depth of up to 2048 entries. The basic architecture consists of:
– Interlocked read and write operations
– Read or write operations at each stage
– Prefetches that can happen independently at varying rates depending on the design implementation
2. Logic RAM (LRAM)
LRAMs provide high-speed memory in a single 3 x 3 logic block. It can process as high as a 64-bit wide read/write per cycle. In addition, the LRAM has 64 MB of on-chip RAM that we can access in parallel to improve programming speed. This allows the user to implement custom logic functions with large arrays of RRAMs.
Organization: The LRAM is an 8 x 8 block with 16 DRAM ports.
3. Multipliers / BMAC5600
The FPGA can implement multipliers to increase the functionality provided by the core FPGA. The multiplier is an additional add-on circuit with programmable logic and can connect to any combination of logic blocks and DSPs.
Clocking and Reset Resources
The FPGA has multiple sources of global clock signals that meet a wide range of design requirements. The sources include PLLs and an external reference clock.
– PLLs: The FPGA has programmable PLLs used to generate the core clock frequencies and other internal clocks. A single PLL can drive up to 4 frequency outputs.
– External Reference Clock: The system can have any of these four reference clocks as the system’s global clock.
-Clock Network Components: You can generate all FPGA clocks within the FPGA. But they require distribution of the core clock throughout the FPGAs on a global basis. Therefore, the FPGA includes a clock network that can provide up to 4 ways of distributing clocks between any combination of multiple devices.
For example, we can install a Speedster22i HD DDX in an automotive application. The DSP and DIO blocks would be helpful for digital functions such as controlling sensors and actuators in the vehicle and so on.
Examples of the Achronix Speedster22i HD include AC22iHD1000-F45C3ES, AC22iHD1000-F45C4ET, AC22iHD1000-F45C4G1S, AC22iHD1000-F45C4G2S, AC22iHD1000-F45C4G3S, and AC22iHD1000-F42ES1M
1. Internet of Things: The FPGA is helpful in many applications such as the Internet of Things, Smart City, Turnkey Embedded Computing, Radar and Sonar systems, Machine Vision Systems, and other embedded systems.
2. Industrial Control: In automation systems, a Speedster22i HD DDX can be helpful in industrial control applications. We can use it in process control, motor control, remote measuring and control systems, etc.
3. Wireless Technology: The FPGA features align with wireless telecommunication applications. These can help in mobile base stations, data communication systems, etc.
4. Consumer Electronics: Consumer electronics is another field where Speedster22i HD AC22iHD1000-F45C3ES can help in video processing, audio processing, and so on.
5. Cloud Computing: The Speedster22i HD DDX can also help cloud computing applications.
6. 5G Technology: The 5G technology is another field where the Speedster22i HD DDX can work.
7. Automotive: The Speedster22i HD DDX aligns with automotive applications. We can use it in various smart vehicles, driver assistance systems, etc.
The most important feature is the direct connection of the DSPs to the FPGA fabric for improved processing efficiency and reduced latency.
The Speedster22i HD DDX is a very flexible FPGA that can handle a wide variety of different computing tasks. We can use it in embedded control, machine vision and vision processing, automation, wireless network communications, data analysis, etc.
“Achronix assumes the entire market will have a desperate need for FPGAs to implement real-time algorithms and that this will create a huge price war between them, Xilinx, and Altera.” But, of course, this assumption depends on the fact that Achronix is famous in the field of high-speed processors.
This means that Achronix can make a huge impact in the market using Achronix Speedster7t FPGAs and Achronix Speedster22i HDT FPGAs. The Speedster7t FPGA is helpful with Achronix’s software tools to implement real-time applications for commercial and military applications, such as radar and vision systems. In addition, the high-end technology of the Achronix Speedster22i HDT FPGA allows it to be utilized in a variety of other fields as well.
“Achronix’s purpose is to provide customers with high-frequency access to data at an affordable price. They do this by using high-frequency datapaths, large on-chip memory capacities, and high integration levels.” Achronix was able to accomplish this goal by increasing the speeds of their FPGAs and reducing the amount of space needed for them. As a result, the Speedster family is more than double its predecessors’ speed while using less power. In addition, the increased level of integration allows for even smaller systems to be created, which saves money and space.