Learn why the 22pF capacitor is the crystal oscillator standard, how to calculate the correct load capacitance for your design, when 22pF is wrong, and why C0G dielectric is non-negotiable. Practical guide for PCB engineers.

Ask any embedded systems engineer what value of capacitor appears most often in their crystal oscillator circuits and the answer is almost always the same: 22 pF. It’s not a coincidence. The 22 pF capacitor has become the de facto standard load capacitance value for quartz crystals used in microcontrollers, USB interfaces, Ethernet PHYs, and dozens of other digital systems. If you’ve ever copied a reference design, there’s a good chance you dropped in two 22pF caps without thinking twice about why.

This guide changes that. We’ll cover exactly why the 22pF capacitor dominates oscillator design, how to calculate load capacitance correctly, what happens when you get it wrong, which package and dielectric to specify, and where the value shows up beyond crystal circuits. Written from a PCB engineer’s perspective — because the difference between a design that oscillates reliably and one that randomly fails comes down to details most tutorials skip.

What Is a 22 pF Capacitor?

A 22 pF capacitor stores 22 picofarads of charge — 22×10⁻¹² farads. In the standard E12 series, 22 pF sits between 18 pF and 27 pF. In the E24 series, neighbors are 20 pF and 24 pF. It’s one of the most stocked ceramic chip capacitor values at any distributor, available from every major manufacturer in multiple package sizes and dielectric types.

At 22 pF, the component sits in an interesting zone: large enough that PCB parasitic capacitance (typically 2–5 pF) represents a known but manageable fraction of the total, yet small enough that dielectric and temperature stability choices matter significantly. At 100 MHz, a 22 pF cap presents about 72 Ω of reactance. At 32.768 kHz (RTC crystal frequency), that same cap presents over 220 kΩ — showing how the same component value behaves completely differently depending on frequency context.

The EIA capacitor code for 22 pF is 220 in three-digit notation (22 × 10⁰ = 22 pF), sometimes written as 22 with a unit label, or 22p in schematic shorthand.

Why 22 pF Is the Crystal Oscillator Standard

The Load Capacitance Formula Explained

To understand why 22 pF dominates, you need to understand crystal load capacitance. A quartz crystal has a specified load capacitance (C_L) at which it will oscillate at its marked frequency. Typical values are 12 pF, 18 pF, and 20 pF for modern low-power crystals, and the older standard of 20 pF that was common for years.

In a Pierce oscillator — the topology used in virtually every MCU crystal circuit — two capacitors connect from each oscillator pin to ground (C1 and C2). The load capacitance seen by the crystal is approximately:

C_L = (C1 × C2) / (C1 + C2) + C_stray

where C_stray is the sum of PCB trace capacitance and the MCU’s internal pin capacitance. For a typical PCB with moderate trace length and an MCU with ~3–5 pF internal capacitance per pin, C_stray commonly runs 3–7 pF total.

Working backward: if the crystal requires C_L = 18 pF and C_stray = 6 pF, then:

(C1 × C2) / (C1 + C2) = 18 − 6 = 12 pF

With C1 = C2 (balanced circuit), each cap needs to be 24 pF — close enough to the standard E12 value of 22 pF that in many designs the error is acceptable.

For crystals specifying C_L = 20 pF, the same math gives external caps closer to 28 pF — but with the tolerance range of C_stray, 22 pF often still falls within the acceptable frequency pulling range.

This is the real reason 22 pF became the default: it’s close enough to correct for a wide range of crystals and PCB configurations that it became a “safe default” in thousands of reference designs. Those reference designs got copied, the value stuck, and now it’s everywhere.

When 22 pF Is Wrong and What to Do About It

The problem is that “close enough” isn’t always close enough. Crystal frequency accuracy depends on presenting the correct load capacitance. Frequency pulling sensitivity (expressed in ppm/pF) varies by crystal type and frequency, but for a 12 MHz crystal, a 1 pF error in load capacitance can cause a 5–15 ppm frequency shift. For USB, that’s a problem — the spec allows ±1500 ppm total, but when you add temperature drift and aging, the margin gets thin fast.

For a 32.768 kHz RTC crystal, the pulling sensitivity can be 40–70 ppm/pF, meaning a 2 pF load error causes 80–140 ppm of frequency error — completely unacceptable for a real-time clock that needs to keep accurate time.

The right approach for any new design: calculate the required external capacitance from the crystal’s datasheet C_L spec, measure or estimate your C_stray, and specify the correct value. Don’t blindly copy 22 pF unless your crystal spec supports it.

Key Electrical Parameters for a 22 pF Capacitor

Understanding the specs that matter for a 22pF capacitor in oscillator and RF applications:

Parameter	What It Means	Recommended Value
Capacitance tolerance	Accuracy of 22 pF value	±1 pF or ±2 pF for oscillators; ±5% for non-critical
Dielectric type	Temperature and voltage stability	C0G (NP0) for oscillators and RF; X7R for decoupling
Temperature coefficient	Capacitance drift with temperature	C0G: ±30 ppm/°C; X7R: ±15% over range
Voltage rating	Max working voltage	25–50 V typical for signal-level use
Q factor	Loss characteristic	Q > 1000 at 1 MHz for oscillator caps
Self-resonant frequency	Frequency of peak impedance	Typically >1 GHz for 0402 22 pF C0G
Operating temperature	Range of stable operation	−55°C to +125°C for industrial grade

C0G vs. X7R for 22 pF Capacitors: Which to Use

This decision matrix comes up repeatedly in design reviews:

Dielectric	Temp Stability	Voltage Coefficient	ESR/Q	When to Use 22 pF Version
C0G (NP0)	±30 ppm/°C (excellent)	None	Very low ESR, Q > 1000	Crystal oscillators, RF circuits, precision filters
X7R	±15% over −55 to +125°C	Moderate degradation	Moderate ESR	Bypass, decoupling, non-frequency-critical applications
X5R	±15% over −55 to +85°C	Moderate degradation	Moderate ESR	Low-voltage bypass only
Y5V	+22% / −82% over range	Severe	High ESR	Never for 22 pF in any meaningful circuit

For crystal load capacitors, always specify C0G. An X7R 22 pF cap might measure exactly 22 pF on the bench at 25°C, then drift to 20 pF at −40°C and 24 pF at +85°C. That ±2 pF swing translates directly into oscillator frequency error, and on designs with tight clock accuracy requirements — USB, Ethernet, CAN bus — that can cause field failures that are genuinely difficult to trace back to a capacitor dielectric choice.

Package Selection for 22 pF Capacitors

Unlike the sub-5 pF range where package choice dramatically affects parasitic-to-signal ratio, 22 pF is forgiving enough that 0402 is practical for nearly all applications. The main consideration is assembly yield and whether the parasitic capacitance of your land pattern is significant compared to 22 pF.

Package	Size (mm)	Pad Parasitic C	SRF (22 pF)	Typical Application
0805 (2012M)	2.0 × 1.25	~0.5 pF	~500 MHz	Through-hole era replacement, high-voltage
0603 (1608M)	1.6 × 0.8	~0.3 pF	~700 MHz–1 GHz	Prototyping, hand-soldering, industrial
0402 (1005M)	1.0 × 0.5	~0.15 pF	~1–2 GHz	Standard choice for most PCB applications
0201 (0603M)	0.6 × 0.3	~0.07 pF	~2–3 GHz	RF, miniaturized designs, very dense layouts

For crystal oscillator load caps, 0402 hits the sweet spot. The pad parasitic (~0.15 pF) is about 0.7% of 22 pF — negligible for most crystal accuracy requirements. Use 0603 if you need hand-soldering flexibility during prototyping. Use 0201 only if you’re working at 2.4 GHz or above and need minimized parasitics.

Calculating the Correct Load Capacitor Value: Step by Step

This is where most reference-design-copying goes wrong. Here’s the correct process:

Step 1: Get the crystal’s C_L from its datasheet. Common values: 6 pF (low-power 32.768 kHz), 8 pF, 12 pF, 16 pF, 18 pF, 20 pF. The 22 pF default assumption only applies if your crystal actually specifies C_L = 22 pF — and fewer modern crystals do, as the industry has moved toward lower load capacitance to reduce power consumption.

Step 2: Determine C_stray. This is the sum of the MCU’s internal pin capacitance (check the datasheet — typically 3–7 pF per pin for the oscillator pins) plus the PCB trace capacitance. A rough rule for PCB trace capacitance: assume ~1–2 pF per 10 mm of trace on standard FR4, depending on ground proximity. If you keep traces short (<5 mm each), C_stray from traces might be only 0.5–1 pF per pin.

Step 3: Calculate the required external capacitance per pin. For symmetric capacitors (C1 = C2 = C_ext):

C_ext = 2 × (C_L − C_stray_total)

Note that C_stray_total is the total stray cap as seen by the crystal — the parallel combination of stray capacitance at each pin. If each pin has C_stray_pin of stray capacitance, then C_stray_total ≈ C_stray_pin / 2 for the series combination formula (assuming equal caps).

Step 4: Round to the nearest standard E12 value. If you calculate 20.5 pF, use 22 pF. If you calculate 15 pF, use 15 pF or 18 pF — don’t automatically default to 22 pF.

Step 5: Verify at corners. If your product needs frequency accuracy over temperature, verify the oscillator frequency at −40°C, +25°C, and +85°C using a frequency counter on a loaded prototype.

Load Capacitance Calculation Example

Crystal: 12 MHz, C_L = 18 pF MCU internal pin capacitance: 4 pF per pin (from datasheet) PCB trace capacitance: ~1 pF per pin (short traces, ~5 mm) Total C_stray per pin: 5 pF Total C_stray seen by crystal (two pins in series): ~2.5 pF (series combination of 5 pF + 5 pF)

Wait — a common confusion here. In the Pierce oscillator model, the two pin capacitances appear in series across the crystal. So C_stray_total as seen by the crystal = (5 × 5) / (5 + 5) = 2.5 pF.

C_ext needed per pin: 2 × (18 − 2.5) = 31 pF → round to 33 pF

In this case, 22 pF would be wrong — it would present a total load capacitance of about 13 pF instead of 18 pF, causing the crystal to run roughly 25–50 ppm fast depending on its pulling sensitivity. Use 33 pF instead.

22 pF Capacitor Applications Beyond Crystal Oscillators

The 22 pF value appears in several other contexts worth knowing:

RF Impedance Matching at VHF/UHF Frequencies

At 433 MHz, a 22 pF cap presents about 17 Ω. This places it in the useful range for shunt elements in matching networks for sub-GHz RF ICs, antenna matching networks for 315–433 MHz ISM band designs, and harmonic filter networks following low-power transmitters.

EMI Filter Design

In pi-filter configurations on data lines and power inputs, capacitors of 22–100 pF are used as shunt-to-ground elements to reduce high-frequency noise. A 22 pF cap in this role provides approximately 6 dB insertion loss at 300 MHz in a 50 Ω system — useful for first-order filtering.

Video Circuit Compensation

In older analog video and high-speed op-amp circuits, small capacitors (10–47 pF) are used as feedback or compensation caps. 22 pF is a common starting value for op-amp stability compensation networks.

High-Frequency Signal Coupling and Bypassing

In some RF signal chains, a 22 pF cap is used as a high-frequency bypass or coupling element where the impedance at the operating frequency (72 Ω at 100 MHz) is useful for signal path impedance transformation.

Recommended 22 pF Capacitor Part Numbers

Manufacturer	Part Number	Package	Dielectric	Tolerance	Voltage
Murata	GRM1555C1H220JA01D	0402	C0G	±5% (J)	50 V
Murata	GRM1555C1H220FA01D	0402	C0G	±1% (F)	50 V
TDK	C1005C0G1H220J050BA	0402	C0G	±5%	50 V
KEMET	C0402C220J5GACTU	0402	C0G	±5%	50 V
Vishay	VJ0402A220JXACW1BC	0402	C0G	±5%	50 V
Würth Elektronik	885012005050	0402	C0G	±5%	50 V
AVX/Kyocera	04025A220JAT2A	0402	C0G	±5%	50 V
Samsung	CL05C220JB5NNNC	0402	C0G	±5%	50 V

For crystal load caps where accuracy matters, consider moving from ±5% (J tolerance = ±1.1 pF at 22 pF) to ±2% (G tolerance = ±0.44 pF) or tighter. At the C0G price point, the cost difference is minimal and the frequency accuracy improvement is real.

PCB Layout Best Practices for 22 pF Crystal Load Capacitors

Getting the oscillator layout right is one of those things that separates a design that works reliably in production from one that starts up unreliably or drifts out of spec at temperature. These are the rules that matter:

Place C1 and C2 as close to the crystal as possible. Every millimeter of PCB trace between the crystal pin and the load capacitor adds parasitic inductance and trace capacitance that changes the effective load seen by the crystal. Keep total trace length under 5 mm per cap.

Ground the capacitor directly to the oscillator ground. Use a dedicated ground via directly at the capacitor pad — don’t rely on the main ground plane through a long trace. High-frequency return currents need a clean, low-impedance path.

Don’t run other signal traces underneath the crystal or near the oscillator loop. Capacitive coupling from nearby signals into the oscillator loop is a common cause of jitter and spurious output frequency.

Shield the oscillator region with a copper pour tied to ground. If your PCB has space, surrounding the crystal and load caps with a ground pour on the component layer helps block external interference from coupling into the sensitive high-impedance oscillator nodes.

Match C1 and C2 placement symmetrically. An unbalanced layout creates different effective capacitances at each crystal pin, which can affect oscillator startup reliability and frequency accuracy.

Follow the MCU manufacturer’s layout recommendation exactly. Every MCU datasheet that includes a crystal circuit will have a layout recommendation or reference section. It exists because the internal PCB designers tested it. Follow it, especially for USB clock crystals where timing matters.

Troubleshooting Common 22 pF Crystal Oscillator Problems

Symptom	Likely Cause	Solution
Crystal won’t start	Load caps too large, driving inverter too weak	Verify C_L calculation; try reducing cap values
Frequency runs fast	Load caps too small (common with 22 pF default)	Increase cap values per correct calculation
Frequency runs slow	Load caps too large	Reduce cap values
Oscillator works on bench, fails in field	Temperature drift from X7R caps	Replace with C0G dielectric
Jitter or phase noise	Poor layout, external coupling	Improve isolation, move caps closer to crystal
Intermittent startup	Marginal drive level, excessive PCB capacitance	Check crystal ESR rating, shorten traces

Where to Buy 22 pF Capacitors

Distributor	Website	Notes
Digi-Key	digikey.com	Full parametric search, filter by dielectric and tolerance
Mouser	mouser.com	Strong stock depth for Murata C0G line
LCSC	lcsc.com	Cost-effective for prototyping quantities
Arrow	arrow.com	Authorized distribution for production traceability
Farnell/Element14	farnell.com	EU/UK preferred for authorized stock
TME	tme.eu	Strong European stock for industrial quantities

Useful Resources and Design Tools

• Murata SimSurfing – Impedance and S-parameter simulation for Murata capacitors: ds.murata.com/simsurfing
• KEMET KSIM – Online impedance and ESR modeling for KEMET parts: ksim.kemet.com
• TDK Product Selector with S-parameter Downloads: product.tdk.com
• Microchip AN826 – Crystal Oscillator Basics and Microchip PIC Oscillator Design – Definitive app note on Pierce oscillator design, C_L calculation, and layout: microchip.com
• STMicroelectronics AN2867 – Oscillator Design Guide for ST Microcontrollers – Detailed worked examples for STM32 crystal selection and cap calculation: st.com
• Texas Instruments SCHA004 – Crystal Oscillator Circuit Design – Covers gain margin, drive level, and load capacitance for TI MCUs: ti.com
• Abracon Crystal Load Capacitance Calculator – Online tool for crystal cap value calculation: abracon.com
• ECS Inc. Crystal Selection Guide – Covers frequency pulling sensitivity and C_L effects: ecsxtal.com
• IPC-2221B – Generic PCB design standard with component placement and trace routing guidance

Frequently Asked Questions About 22 pF Capacitors

Why do most MCU reference designs use 22 pF for crystal load capacitors?

The 22 pF default traces back to an era when most crystals specified C_L = 20 pF or 22 pF, and MCU pin capacitances and typical PCB stray capacitances happened to make 22 pF external caps give a reasonable total load for a broad range of designs. It became a copy-paste default in countless reference designs, application notes, and eval boards. The problem is that modern crystals increasingly specify lower C_L values (12 pF, 9 pF, 7 pF) to reduce power consumption, and many designs still use 22 pF out of habit — presenting too much capacitance and causing the crystal to run slow.

Does it matter if I use C0G or X7R for a 22 pF crystal load capacitor?

Yes, it matters significantly. X7R capacitance can vary by ±15% over the operating temperature range. For a 22 pF cap, that’s a swing of ±3.3 pF. Crystal frequency is pulled by changes in load capacitance, typically 10–30 ppm per picofarad depending on the crystal. A 3 pF load change from X7R drift could cause 30–90 ppm of frequency drift over temperature — completely unacceptable for USB (±1500 ppm spec, but with manufacturing and aging tolerance), Ethernet PHY clocks, or RTC crystals. Always use C0G for oscillator load capacitors.

What tolerance should I specify for a 22 pF crystal load capacitor?

For most applications, ±5% (±1.1 pF) is sufficient when you’ve correctly calculated the target value. If your application requires tight frequency accuracy (GPS, USB, high-speed serial communications), consider ±2% (G tolerance, ±0.44 pF) or ±1% (F tolerance, ±0.22 pF). The cost premium for tighter tolerance C0G caps in 0402 is small, and the improvement in frequency consistency across your production units is worthwhile in precision applications.

My oscillator works at room temperature but drifts at temperature extremes. What’s wrong?

Most likely you’re using X7R dielectric load caps, which drift significantly with temperature. The fix is to swap them for C0G dielectric — same value, same package, just different dielectric. If you’ve already confirmed the caps are C0G, the next candidates are: crystal itself at its aging/temperature limits, PCB substrate capacitance changes with temperature (significant in some high-Tg materials), or a marginal drive level that becomes insufficient at temperature extremes. For the latter, check the crystal’s ESR specification at temperature and compare to the MCU oscillator’s drive capability.

Can I use a single 22 pF capacitor instead of two separate ones in a crystal circuit?

No. The Pierce oscillator topology requires two separate capacitors, one from each crystal pin to ground. They form the capacitive divider that, along with the crystal’s equivalent inductance and the inverter’s phase shift, establishes the 360° total loop phase required for oscillation. A single capacitor in this position would create an asymmetric circuit that would likely not oscillate or would oscillate with poor stability. Some MCUs integrate the load capacitors internally as programmable capacitor arrays, in which case no external caps are needed — check the datasheet.

The 22 pF capacitor earned its place as the crystal oscillator standard through a combination of practical math and decades of copy-paste reference design culture. Understanding the load capacitance formula, recognizing when 22 pF is right and when it isn’t, and always specifying C0G dielectric are the three habits that will save you more debug time on oscillator-related field failures than any other single design decision. The component is simple, the physics is straightforward, and there’s no reason to get it wrong once you understand what that 22 pF value is actually doing in your circuit.