A 33 pF capacitor delivers ~5 Ω at 900 MHz, making it essential for RF bypass, crystal load tuning, and ISM-band filtering. Full guide with formulas and layout tips.

There is a moment in almost every GSM, GPS, or IoT hardware bringup where someone points at the schematic and asks why there is a 33 pF capacitor on the supply pin of the RF module. If you have been designing RF boards long enough, you already know the answer — and if you are just getting started, this article will save you hours of puzzling over reference designs. The 33 pF capacitor sits at a sweet spot between picofarad precision and useful reactance across the 300 MHz–1.5 GHz band, making it one of the most frequently specified values in RF supply bypassing, crystal load tuning, and front-end filter networks. What follows is a practical, engineer-focused breakdown of every significant role this value plays, backed by the math that explains why it works.

What Is a 33 pF Capacitor?

A 33 pF capacitor stores 33 picofarads of charge — written as 0.033 nF or 0.000033 µF. On a ceramic disc or through-hole body, it is often marked simply 33 (no units) or with the three-digit code 330 (33 × 10⁰ pF). That last marking trips up engineers regularly: a “330” marked ceramic is 33 pF, not 330 pF. If you are ever unsure, check with an LCR meter or verify the EIA code against the distributor datasheet before it ends up in the wrong bin.

Like all small ceramic capacitors in this range, the 33 pF is non-polarized, meaning it installs in either orientation — no anode or cathode to worry about. Its primary construction is multilayer ceramic (MLCC), and in any RF or oscillator application the dielectric must be C0G/NP0, for reasons explained in detail below.

Capacitive Reactance of 33 pF Across Key Frequencies

Frequency	Application	Xc of 33 pF
10 MHz	High-speed crystal reference	~482 Ω
50 MHz	IF stage, FM IF	~96 Ω
100 MHz	VHF, FM band	~48 Ω
315 MHz	ISM, remote control	~15 Ω
433 MHz	LoRa, IoT, RFID	~11 Ω
900 MHz	GSM, NB-IoT, LPWAN	~5.4 Ω
1.575 GHz	GPS L1	~3.1 Ω
2.4 GHz	Wi-Fi, Bluetooth	~2.0 Ω

At 900 MHz the 33 pF delivers only about 5 Ω of reactance — near short-circuit for RF noise. That is not a coincidence. The value became a classic RF supply bypass capacitor specifically because, in older 0603 packaging, its self-resonant frequency (SRF) landed squarely near 900 MHz, providing minimum impedance right at the GSM band. In modern 0402 packaging the SRF shifts higher, making it useful across an even broader range of sub-1 GHz applications.

The 33 pF Capacitor as an RF Supply Bypass Element

Why 900 MHz RF Designers Reach for 33 pF

Every RF IC — LNA, PA, mixer, VCO, transceiver — needs its supply pin decoupled to ground so that RF energy cannot couple back into the supply rail and cause oscillation, modulation pulling, or instability. The bypass capacitor must present a very low impedance at the operating frequency. A 100 nF or 10 µF electrolytic does an excellent job at audio frequencies and below; it is essentially useless at 900 MHz because its ESL makes it look inductive long before it reaches that frequency.

Enter 33 pF. In a 0402 C0G package with approximately 0.7 nH of ESL, the SRF is approximately:

SRF = 1 / (2π × √(L × C)) = 1 / (2π × √(0.7×10⁻⁹ × 33×10⁻¹²)) ≈ 1.05 GHz

That puts the minimum impedance point right in the 900 MHz–1.05 GHz range — ideal for GSM, LPWAN, and sub-GHz ISM band supply bypassing. This is why experienced RF engineers use 33 pF for 900 MHz applications and 10 pF for 1.8–2.4 GHz applications: the SRF is deliberately matched to the threat frequency.

Multi-Capacitor Bypass Strategy

No single capacitor value covers the full frequency span of supply noise in a typical RF system. The industry standard approach layers multiple values:

Capacitor Value	Role	Target Frequency Range
10 µF (electrolytic or tantalum)	Bulk energy storage, low-frequency ripple	DC – 1 MHz
100 nF (X7R MLCC)	Mid-frequency decoupling	1 MHz – 50 MHz
33 pF (C0G MLCC)	RF suppression at 300 MHz–1 GHz	300 MHz – 1.2 GHz
10 pF (C0G MLCC)	RF suppression at 1–2.4 GHz	1 GHz – 3 GHz

In a compact IoT module designed for 868 MHz, you will commonly see the 33 pF and 100 nF sitting physically adjacent on the RF IC’s supply pin, each targeting its own segment of the frequency spectrum. The 33 pF handles the band of interest; the 100 nF handles lower-frequency ripple from the switching regulator.

33 pF in Crystal Oscillator Load Tuning

When Does 33 pF Show Up as a Crystal Load Capacitor?

The Pierce oscillator, used in nearly every modern microcontroller crystal circuit, needs two matched external load capacitors (CL1 and CL2) from each crystal pin to ground. The required value of each external capacitor is:

CL1 = CL2 = 2 × (CL_crystal − Cstray)

Where CL_crystal is the load capacitance specified on the crystal datasheet and Cstray is the combined stray capacitance from PCB traces and IC input/output pins (typically 2–5 pF on a well-designed board).

The 33 pF value shows up in two distinct crystal scenarios:

Scenario 1 — High-load crystals (CL = 16–18 pF): Texas Instruments’ oscillator fault wiki notes that if a quartz is specified for a load of 16 pF, two 32 pF capacitors are technically required — and 33 pF is the closest standard E12 series value. Many 32.768 kHz RTC crystals and older 8–20 MHz MCU crystals specify 18 pF or 20 pF load capacitance, where external capacitors of 33–39 pF are the standard solution.

Scenario 2 — Conservative legacy designs: Reference schematics from discrete oscillator ICs like the CD4060 timer have historically paired a 32.768 kHz crystal with asymmetric load capacitors (10 pF on one side, 33 pF on the other) for tested, reproducible oscillator startup behavior.

Crystal Load Capacitor Calculation Example

Say your RTC crystal datasheet specifies CL = 12.5 pF and you estimate Cstray = 3 pF for your four-layer board:

CL1 = CL2 = 2 × (12.5 − 3) = 19 pF

The nearest E12 value is 18 pF or 22 pF. If your crystal has CL = 18 pF and Cstray = 4 pF:

CL1 = CL2 = 2 × (18 − 4) = 28 pF → nearest standard value: 27 pF or 33 pF

That is exactly why 33 pF appears in so many legacy MCU and RTC crystal designs — it is the correct calculated answer for a 18 pF CL crystal on a moderately parasitic board.

Load Capacitance Impact on Crystal Frequency

Mismatch Type	Effect on Frequency	Consequence
CL1/CL2 too large	Oscillator runs below nominal frequency	Timing drift, slow clock
CL1/CL2 too small	Oscillator runs above nominal frequency	Fast clock, potential start-up issues
CL1 ≠ CL2 (asymmetric)	Asymmetric phase shift, frequency instability	Increased jitter, poor temperature stability
X7R instead of C0G	CL drifts with temperature	Frequency wanders across operating range

33 pF in RF Matching and Filter Networks

Impedance Matching at Sub-1 GHz

In an L-network or pi-network matching a power amplifier output to an antenna at 433 MHz or 868 MHz, the calculated shunt or series capacitor value frequently falls in the 22–47 pF range. The 33 pF value — delivering about 11 Ω reactance at 433 MHz — is a natural solution for the shunt-to-ground element in a low-pass output matching topology.

Reference designs for CC1101, Si4432, SX1276, and other sub-1 GHz transceivers routinely show 33 pF elements in the antenna matching network. These are not arbitrary: they come from manufacturer-calculated LC matching networks for specific output impedances.

LC Bandpass and Low-Pass Filter Elements

In a Chebyshev low-pass filter protecting the receive path of a 900 MHz front-end from out-of-band interferers, the filter’s shunt capacitor values typically land between 10 pF and 68 pF depending on the filter order and impedance level. A 33 pF capacitor is a standard element in three-pole or five-pole LC filters at sub-GHz frequencies, providing the selectivity that keeps unwanted harmonics and out-of-band signals from desensitizing the receiver.

Dielectric and Package Selection for the 33 pF

C0G/NP0 Is Non-Negotiable in RF and Oscillator Use

C0G (NP0) dielectric provides ±30 ppm/°C temperature stability, effectively zero voltage dependence, and a Q factor typically exceeding 1,000. These properties are mandatory for a 33 pF used as either an RF bypass element or a crystal load capacitor.

Using X7R here introduces up to ±15% capacitance shift across the operating temperature range. On a crystal load capacitor, that drift can move the oscillation frequency by 5–15 ppm depending on the crystal’s pullability — a meaningful error in any GPS-synchronized or radio-protocol-constrained system.

Dielectric	Temp Stability	Q Factor	Voltage Dependence	33 pF Crystal Load?	33 pF RF Bypass?
C0G / NP0	±30 ppm/°C	>1000	None	✅ Required	✅ Best choice
X7R	±15%	100–500	Moderate	❌ Not acceptable	⚠️ Only with SRF awareness
X5R	±15%	<300	High	❌ Avoid	❌ Avoid

Package Size and SRF for the 33 pF

Package	Typical ESL	Approx. SRF for 33 pF	Best Application
0201 (0603M)	~0.3 nH	~4.9 GHz	2.4 GHz bypass, high-density RF
0402 (1005M)	~0.5–0.7 nH	~3.3–3.9 GHz	900 MHz–1.5 GHz bypass, matching
0603 (1608M)	~0.8–1.0 nH	~2.8–3.1 GHz	Crystal load, 433 MHz circuits
Through-hole	~2–5 nH (lead length)	<1.5 GHz	Prototype and legacy PCB only

For GSM 900 MHz bypass, a 0603 package is still acceptable and the SRF aligns well with the target frequency. For any GHz-range RF application use 0402 or smaller to keep SRF above the operating frequency by a safe margin.

PCB Layout Considerations for 33 pF Components

Getting the 33 pF right on paper only pays off if the PCB layout supports it.

For RF bypass: Place the 33 pF as close as physically possible to the supply pin being decoupled. The ground via for the capacitor’s ground pad should be co-located — not routed away on a long trace. Every millimeter of trace and every via adds inductance (roughly 0.5–1 nH per mm at RF frequencies), which shifts the effective SRF downward and reduces bypass effectiveness.

For crystal load capacitors: Keep CL1 and CL2 equidistant from the crystal and use matched trace lengths. Do not run ground fills directly beneath the crystal traces — this adds stray capacitance that changes your effective CL from what you calculated and can push the oscillator off frequency. Keep the entire crystal circuit away from digital switching signals, power planes, and SMPS inductors.

Pad sizing: Oversized SMD pads add capacitance to ground. For a 33 pF component on RF work, use the manufacturer’s recommended minimum land pattern. Adding extra solder mask or enlarged copper areas can easily contribute 0.2–0.5 pF of parasitic capacitance — small in absolute terms, but 0.6–1.5% of your 33 pF value, which is comparable to the component’s own tolerance.

Verify on first prototype: Because Cstray depends on your specific layout, layer stackup, and trace geometry, always measure the actual crystal oscillation frequency on the first prototype board using the MCU’s clock output pin and a frequency counter. Tune the external capacitor values from there rather than trusting the calculation blindly.

33 pF Capacitor Quick Specification Checklist

Parameter	Recommended Specification
Capacitance	33 pF
Tolerance	±0.5 pF (crystal load); ±1 pF or ±5% (RF bypass)
Dielectric	C0G / NP0
Voltage rating	≥ 16 V; typically 50 V for MLCC stock
Package	0402 for RF circuits; 0603 for crystal load if space allows
Operating temperature	−55°C to +125°C
SRF	Must exceed operating frequency by at least 2×
ESR at operating freq	< 0.3 Ω
Qualification	AEC-Q200 for automotive designs

Useful Resources for 33 pF Capacitor Selection

Resource	Type	Link
ECS Inc. Crystal Load Capacitance Calculator	Online tool	ecsxtal.com
Texas Instruments Oscillator Fault Reasons Wiki	Application guide	processors.wiki.ti.com
STMicroelectronics AN2867 – Oscillator Design Guidelines	App note (PDF)	st.com
Murata SimSurfing – S-parameter & Impedance Tool	Component database	ds.murata.co.jp/simsurfing
Johanson Technology – SRF/PRF for RF Capacitors	Technical note	johansontechnology.com
AllAboutCircuits – Crystal Load Capacitance Explained	Technical article	allaboutcircuits.com
LCSC – Tips for Crystal Oscillator Selection	Purchasing guide	lcsc.com
RayPCB – Capacitors in PCB Design	PCB design guide	raypcb.com/pcb-capacitor

Frequently Asked Questions

1. Why is 33 pF recommended for GSM 900 MHz supply bypassing and not just any small capacitor?

The 33 pF value became the standard for 900 MHz RF supply bypassing because, in the 0603 package that dominated early mobile phone PCB designs, its self-resonant frequency fell right around 900 MHz. At SRF the capacitor’s impedance is at its minimum — only its ESR remains. That “free resonant trap” effect at the target frequency made 33 pF the most efficient choice. With 0402 packaging now standard, the SRF of a 33 pF shifts upward to 1.0–1.2 GHz, which still covers sub-GHz ISM and GSM bands well, and the value has stayed in widespread use.

2. My crystal datasheet says CL = 16 pF. Should I use 33 pF for both load capacitors?

Approximately, yes — but you need to subtract stray capacitance first. The formula is CL1 = CL2 = 2 × (CL − Cstray). With CL = 16 pF and typical Cstray ≈ 3–4 pF, you get CL1 = CL2 = 24–26 pF. The nearest E12 values are 22 pF or 27 pF, not 33 pF. Using 33 pF would overload the crystal and push the oscillation frequency below nominal. Use 33 pF only when the crystal CL is 18–20 pF and your stray capacitance estimate brings the calculation close to that value.

3. Can I use a 33 pF X7R capacitor as a crystal load or RF bypass component?

For crystal load applications, no — X7R capacitance changes by up to ±15% over temperature, directly shifting the crystal frequency. For RF bypass at 900 MHz, X7R can work in non-critical designs, but its lower Q (higher ESR) and reduced SRF compared to C0G mean it provides less effective bypassing. C0G is the correct choice for both applications and it is not significantly more expensive in standard MLCC values.

4. What is the difference between a 33 pF marked “33” and one marked “330” on the body?

This is a genuine source of confusion. When a ceramic capacitor value is in picofarads and the two-digit number requires no multiplier (because the multiplier digit is zero — meaning ×10⁰ = ×1), the “zero” may be included or omitted depending on the manufacturer’s marking convention. Both “33” and “330” can mean 33 pF. A “331” would mean 330 pF (33 × 10¹). When in doubt, test the capacitor with an LCR meter or verify the exact part number against the distributor catalog before installation.

5. Does the 33 pF capacitor work well at both 433 MHz and 868 MHz simultaneously in a dual-band IoT design?

Not optimally. The reactance of 33 pF at 433 MHz is about 11 Ω and at 868 MHz it is around 5.5 Ω — it provides reasonable bypassing at both frequencies. However, the SRF of a 0402 33 pF (~1 GHz) means the component is operating as a capacitor across both bands without hitting its minimum impedance point at either. For a dual-band design it is better to use a 100 nF in parallel with both a 33 pF (targeting 868 MHz) and a 10 pF (targeting the higher band) to ensure each frequency has a capacitor near its SRF, rather than relying on a single value to cover everything.

Conclusion

The 33 pF capacitor earns its near-universal presence in sub-GHz RF designs through a combination of well-matched reactance, useful SRF alignment, and E-series availability. In crystal oscillator circuits it shows up as the correct external load capacitor when the crystal CL is 18–20 pF and stray capacitance is accounted for properly. On RF supply pins it delivers minimum impedance at 900 MHz–1.2 GHz depending on package size, suppressing the very noise frequencies that degrade receiver sensitivity and transmitter spectral purity. In matching networks and filters for LoRa, GSM, and ISM-band front-ends, its reactance sits squarely in the design equations for 433–868 MHz circuits. The rules are consistent across all of these use cases: always select C0G/NP0 dielectric, choose the package based on your target SRF, keep tolerances tight, and treat layout as part of the component specification.