In a circuit system, the clock is an essential part. The clock circuit is quite critical, which is like the function of the human heart. If the clock of the circuit system is wrong, the system will be disordered. Therefore, it is necessary to design a good clock circuit in the PCB.
Our commonly used clock circuits are: crystal, crystal oscillator, clock distributor. Let us explain the clock circuit layout, wiring principles and precautions.
1. the crystal clock circuit
Commonly used crystal packages are: 2-pin DIP package and SMD package, 4-pin SMD package.
See as below:
Although the crystals have different specifications, their basic circuit design is same. So the layout and routing rules of the PCB are also common. The basic circuit design is as follows:
As we can see from the circuit schematic, the circuit consists of a crystal + 2 capacitors, which are the gain capacitor and the phase capacitor.
When we make crystal circuit lay out, two capacitors should be placed close to the crystal, and the layout effect diagram is as follows:
The line should be as short as possible and thickened and packaged. The effect is as follows:
The above is the most basic and most common crystal circuit design, there are also some deformation design, such as adding series resistance, test points, etc., as shown below, the design idea is still consistent:
In summary, the layout should pay attention to:
1.The crystal and IC layout are on the same level, so that less holes can be punched;
2 .The layout should be compact, the capacitor is located between the crystal and the IC, and placed close to the crystal, so that the clock line to the IC is as short as possible;
3. For cases with test points, try to avoid stubs or make stubs as short as possible;
4. Do not place amplifying power devices nearby, such as power chips, MOS transistors, inductors, etc.
Wiring should pay attention to:
1. The crystal and IC are laid out in the same layer. The same layer is routed, and the hole is drilled as little as possible. If punching, it is necessary to add a reflow hole nearby.
2.Class differential traces;
3. The trace should be bold, usually 8~12mil; since the crystal clock waveform is sine wave, it is treated according to the analog signal wiring design idea here;
4.The signal line is covered by the ground, and the grounding wire or copper skin is to be shielded;
5. The crystal circuit module area is equivalent to the analog area. Try not to pass other signals.
2. the crystal clock circuit
Compared with the crystal circuit, the crystal oscillator is an active circuit, which is mainly composed of three parts: crystal oscillator + power supply filter circuit + source matching resistor: common circuit design is as follows:
The layout and layout effect diagram is as follows:
3. The clock distributorcircuit
There are many types of clock distributors. When designing, ensure that the distance between the clock distributor and each IC is as short as possible, usually in a symmetrical position, for example:
Clock distributor circuit:
The PCB design is as follows:
Summary of layout and wiring:
1. The clock generation circuit should be close to the clock distributor. The common clock generation circuit is a crystal or crystal oscillator circuit.
2.The clock distribution circuit is placed in a symmetrical position to ensure that the clock signal lines to each IC are as short as possible;
3.Do not place amplification power devices nearby, such as power chips, MOS tubes, inductors, etc.
4.When the clock signal line is too long, it can go inside the inner layer, and there should be a reflow hole in the 200 mil range of the layer-changing hole;
5.Other signals and clock signals maintain a 4W spacing;
6.Pack the ground and add the shield hole.