The mistakes which engineers commit cannot be neglected. There is no chance to neglect such mistakes considering them of lower level as it will affect the excellence of PCB design. A huge number of mistakes which engineers are making are relevant to a large number of considerations such as signal integrity, efficiency of system, cost saving, and lower energy consumption etc. It can be said that the mistakes are as a result of kindness. Therefore, the engineers must have an awareness regarding such kind of kindness and avoid all such mistakes in order to make sure a perfect PCB design.
Mistakes Related to System Efficiency
1. Change of CPU
Few of engineers have observance that the CPU which has a processing power of 100M has an efficiency of almost 70 percent and they have mind of changing CPU to one having processing power of 200M. It is a fact that the processing of frequency of system is involving various elements in areas such as communication where there is difficulty on memory. It means that even having CPU of high speed will exhibit chances to have a low quality PCB.
2. Higher Speed of System is Result of Greater Cache
It is not a necessary fact that having a larger cache will improve the performance of the system, but in fact in some cases shutdown of cache is leading to faster speed of systems because of the data which moved in to cache has acquired more applications than the efficiency of system to increase.
3. Having a Belief that Interruption can be faster than making Query
The interruption might have stronger instantaneity, however it is not that faster. However, in case of too many interruptions, the system is taking a breakdown because of the discontinuity of the current interruptions. In case if there are numerous tasks, there would be so many efforts of CPU which are spending on the rate of interruptions to make the system of lower efficiency and slow. Therefore, when the query is being applied, the efficiency of system is improving.
4. There is no need of Modification of memory interfaces in time sequence
The determination of the default values in the memory interfaces is done through use of conservative parameters which lies in the practical application. Therefore, there should be necessary modification in accordance to the frequency of operation of bus as well as waiting period.、
5. The Processing Power in Increased by More CPUs
It is old saying that 2 heads are always better than having 1 head. However, the case is not so with CPUs. If the number of CPUs are increased then the coordination among them is difficult which causes troubles.
Mistakes Related to Integrity of System
1. The Over Faith in Data of Simulation
The simulations cannot be substitute to the practical as numerous differences may be occurring in each product. The simulations are often failing for taking the possibilities of almost all considerations related to a project, hence simulations should not be over trusted.
2. The Edge of Digital Signal must be Steep
When the edge of the digital signal is steep then spectral range will be quite larger and there will be more energy in the higher frequencies. The radiation of signals which are produced by higher frequencies are easily interfering with the nearby signals and transmission is impacted.
3. There should be more use of decoupling capacitor.
The quantity of decoupling capacitors in the circuitry is demonstrating the stable power, but its use more than requirements also has some disadvantages such as high cost, tough routing, and higher impulse current.
Mistakes Related to Consumption of Energy
1. Energy Consumption must not be neglected when having 220V Supply
The fact of having lower energy consumption in the design is not only lying in power saving but it is also decreasing the cost of the module of power as well as less heat is dissipated. The consideration of power supply is not sufficient when consumption of energy is considered.
2. Resistors should pull Bus Signals
There are instances when bus signals must be pulled by resistors, however it is not the case always. The amount of current consumed whenever a pure is being pulled or down is in tens of a micro-ampere but the current which is consumed is of quantity to pull down or up an entire driven signal reaching to milliamp level.
3. When I/O Interfaces are Left Unused
When there are unused interfaces of I/O at FPGA and CPU, then there is a possibility of it becoming the input signals which are having abundant oscillations even if there is less interference from the outside environment. The best solution is therefore using all I/O interfaces.
4. Energy Consumption of Small Chips should be considered
The determination of the energy consumed by small chips is very difficult, therefore the determination of its energy consumption is done at its pins. For instance, the energy consumed by ABT16244 is in the range of 1mA when there is no load, but the capability of its each pin is to drive a load of almost 60mA which makes its maximum energy consumption in case of full load to be 960mA.
5. Excellent Matching can result in Estimation of Overshoot
Overshoot is existing for almost all sorts of signals with an exception of specific signals e.g. CML or 100BASE-T. The process of matching is not compulsory if it is of no large size. High requirements are aroused through matching e.g. impedance at output of TTL is way more less than 50 Ohms and if larger matching is done then current is to become large which will cause the energy consumption to fail. Moreover, the amplitude of signals is also becoming small which is not possible to be utilized again. Hence, there must be matching among signals e.g. LVDS, TTL, and 422 for having an suitable overshoot and is the best solution.
Problems Related to Cost Saving
1. Overlooking Accuracy of Resistance of the Pull-Down/Pull-Up Resistors
There are few engineers who are not taking care of the accuracy of resistance of pull-down/pull-up resistors e.g. such engineers are tending to choose resistances at random. Therefore, the resistances which resistance has an accuracy of 20 percent will come through sort of 1K to 6.8K. Therefore, the cost-effectiveness is therefore compensated through neglecting accuracy of resistances.
2. CPLD Application for Top Quality
A few engineers are also applying CPLD in place of the gate circuitry of 74** for having a top quality. However, the cost is increased because of the choice for some of work related to filing and production of the final design of PCB.
3. Use of Fastest FPGA, MEM, and CPU
With the process is continued with the requirements of higher system, the engineers are thinking of the chips which are having fastest speeds such as FPGA, CPU, and MEM. However, it is a fact that not all the parts of the higher speed systems are working at higher speeds. Furthermore, the working speed of the component improvement is also leading to the increase of the total cost as well as interference is increased in the integrity of signals.
4. Reliance of Autonomous Routing
The PCBs which have a lower requirements of design, few of engineers are depending only on the autonomous routing of all components. However, the automatic routing is tending to have a trouble of having a larger PCB area which is not desirable and is having larger vias which are almost double when manual routing is applied. It is a fact that the number of lines in the PCB along with number of vias are directly affecting the cost of the PCB and yielding a higher drilling consumption, more use of cleaning agent, more use of soldering wire, and power consumption by soldering iron.
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