With the advancement and abruptly increasing technology in the domain of PCB design engineering, has led to the development of some high tech electronic products that plays critical role in major industrial sectors like automotive, consumer, space and defense, military and in general computer and IoT.
The demand of high speed, exclusive performance and low cost electronic devices by customers has led to the introduction of miniature, ultra small, high density PCB layout design and corresponding component selection by designers. Some of the most widely used electronic Integrated Circuit (IC) packages used in these PCBs are BGA ( Ball Grid Array), QFN (Quad Flat No lead with plastic body), LCC (Leadless Chip Carrier with ceramic body), and QFP (Quad Flat Pack). While the first three are packages without "leads". The pins (or leads) are under the package body, these are actually called "soldering ends" or "lead finger" for QFN package. The pin count for QFN is very high and hence QFN package offers high density interconnect i.e. the soldering ends are contained inside the package body hence consuming less space on board and giving room to other components tightly placed on board.
The QFP package has its pins outside the body and needs more space on board hence not suitable for HDI PCBs.
The QFN package unlike BGA, does not require solder balls but the electrical and mechanical connection between the QFN and PCB is solely due to solder paste melted by reflow soldering process. This solder paste will cool down and make strong connection between soldering end of QFN and its corresponding pad on PCB.
Due to the shortest distance between the solder pad on PCB and soldering ends of QFN package, the electrical characteristics is extremely good. This also improves the thermal performance and efficient heat dissipation in QFN packages. Unlike the common PLCC (Plastic Leaded Chip Carrier) which needs more area on board due to the pins are not under the package body but surround four sides of square or rectangular body/package, the QFN greatly reduces dimensions, thickness, weight of overall IC package and inductance is downgraded to 50% to improve signal integrity. These QFN package ICs are highly recommended in smart phones, mobiles, computers, RAM/memory circuits and motherboards.
QFN Package Dimensions and Land Pad Design:
The IPC-7351 is the standard used overall in the industry to develop the PCB land pattern or land pad for QFN and SON (Small Outline No lead) packages. The diagram shows the QFN and SON typical package dimensions. The corresponding land pattern will be something like this as shown below
Amax = Outer extents of pad widths per each side
Zmax = Outside pad terminal dimension typically 0.8mm larger than the package body as a starting point
Gmin = Inside pad terminal dimension
X = Lead pad / Land pad width
Y = Lead pad / Land pad height
CLL = Corner pad edge to adjacent inside pad distance
CPL = Central pad to inside edge of lead pad distance which should not be reduced to smaller than 0.2mm
Zmax is the outside and Gmin is inside pad terminal dimensions and solder bridging is prevented by CLL and CPL definitions
PCB Lead Pad Length and Width considerations:
It is recommended that the lead pad must be designed at least 0.1mm greater than package lead finger length and extended to the center line called "heel" by 0.05mm . The lead finger length is also called "toe length"
It is recommended that the PCB lead pad must be 0.025 mm per side wider than the lead finger width of package. In order to avoid solder bridging between components of lead pitch 0.5mm (max terminal width = 0.3mm), then the pad width should be reduced to less than or equal to 0.28mm.
Exposed Pad and Thermal Pad Via Considerations:
As per the different experiments conducted by tech companies, an adequate CLL and CPL clearance of 0.2mm is enough for many designs. The size of thermal pad on PCB should be equal to the exposed pad on the bottom of QFN package. The vias on thermal pad of QFN are placed to optimize the thermal management of board. These vias can be 1.0mm pitch with drill hole diameter 0.3mm. Via solder mask must be 0.1mm larger in diameter than via hole. These vias can be "tented" from top or bottom side of PCB. The tenting from back side of PCB can cause air trapped and voiding issues hence tenting from top is recommended. The exposed pad of QFN should always be soldered to PCB thermal pad for reliability and strength.
The Non Solder Mask Defined pad (NSMD) is more suitable as compared to Solder Mask Defined pad ( SMD) because it is easier to control corrosion in copper and reliability is increased by placing solder paste around metal pads with soldering connections. The NSMD has solder mask opening bigger than the PCB metal pad while SMD has solder mask opening smaller than metal pads. The NSMD can be used for Input / Output (I/O) finger leads of QFN while for thermal pads, SMD can be used.
The NSMD opening can be 100um to 140um larger than the lead finger pad size. The clearance of 50um should be maintained between solder mask and metal pad for 0.5mm pitch lead QFN component.
Solder Paste Screen Printing Process:
The two main things in the process is 1- Solder paste 2- Stencil.
The solder paste is a "Thixotropic" material meaning a pressure/force/energy is required to apply on it so that it is flowed evenly into the stencil apertures by changing its viscosity. The SN63/Pb37 alloy commonly used for QFN and SON mounting and soldering. The reflow soldering profile and parameters are determined by solder paste material. The aggressive flux (flux is an adhesive that is used to components in place) use is not recommended for CSP and QFN / SON type packages soldering but allowed in case if its residues can be cleaned from underside of stencil and part.
The stencil is made of stainless steel or nickel cut with laser giving smooth side / aperture walls. The thickness and opening geometry of stencil will determine the amount / volume of solder paste applied on land pattern. Because in QFN the lead finger and thermal pads are contrast / different from each other so a uniform height / thickness of solder paste can be a challenging task.
Typical Solder Paste Values for Thickness
50um to 75um thickness of solder joint of finger lead is reasonable. This is directly proportional to the amount / volume of solder paste applied on thermal pad of QFN/SON. The stencil thickness is typically 125um for 0.5mm pitch QFN. The thickness of stencil is evaluated from area and aspect ratios for minimum aperture in use.
QFN Lead Finger Stencil Design Parameters:
For 0.5mm QFN / SON packages, the stencil aperture is reduced by 20% to prevent shortening below the QFN body, carefully checking that area and aspect ratios are not exceeded. Typically the stencil aperture and PCB pad size are in the ratio of 1:1. For 0.4mm pitch, a 0.2mm pad is reasonable to help achieve a gap of 0.2mm between pads and help in solder paste printing.
Stencil dimensions for a 0.5mm pitch device (QFN or SON) with 0.85mm x 0.28mm wide pads, a stencil aperture of 0.8mm x 0.23mm and thickness 0.125mm is adequate.
Formula for Aspect Ratio and Area Ratio: