PCB Layer Stack Up

The demand for gadgets having smaller size, lightweight, more features, high speed, high performance while low cost and mass manufacturability is increasing day by day. Companies are looking for increasing their profit margins while customers are demanding more futuristic devices and gadgets. The said demand of valued customers can only be accomplished by implementing multiple layers in PCB design and fabrication.

 

The multiple layer PCB having more conductive layers is also called “Multilayer PCB”. The multilayer PCB is the one that have 1 top layer or copper, 1 bottom layer of copper and 1 layer that is inside the PCB layer stack. There should be at least 3 copper layers in multilayer PCB as mentioned above.

 

For example a multilayer PCB with 6 layers is said to have 6 layers of copper either it is Ground or Power plane or Signal layer. Usually the conductive copper layer is pre-impregnated upon and below the FR-4 glass fiber sheet then another pre-preg layer is covered upon and below the stack and then another copper layer is covered on top and bottom and so on.

 

Up-to 4 layers of PCB the single core is good, but for more layers like for 6 layers there should be 2 cores and for 8 layers there should be 3 cores. The layers are always taken in even numbers for purpose of uniformity in layer stack.

 

Important Considerations of Multilayer PCB Stack up:

 

Important Considerations of Multilayer PCB Stack up

 

The multilayer PCB is the combination of two or more single or double sided PCBs hence a strong mutual connection is in between. The increasing complexity of multilayer PCB give rise to some typical issues that are noise, signal interference, cross talk, stray capacitances and impedance mismatch. These issues are needed to be professionally handled otherwise the overall PCB performance and reliability can greatly shatter.

 

A properly designed layer stack up can help reduce circuit’s vulnerability to Electromagnetic Interference (EMI) and external noises that can distort high speed signals. A good layer stack up also helps to avoid cross talks, improves signal integrity and impedance matching can reduce power losses. The perfect layer stack can also reduce cost of manufacturing of multilayer PCB.

 

Layer Stack Example of 8-Layer PCB

 

The multilayer stack up will enable you to place more circuitry on the limited space while diverting your routing to internal signal layers by means of blind and buried vias. The separate ground GND and power PWR planes are used which are also copper layers.

 

The layer stack up should be symmetrical and the minimum clearance between traces, layers spacing, and the thickness of core should be carefully taken. The thickness of core can be from 0.1mm to 0.3mm.

 

The base substrate core material FR-4 is pre-impregnated with epoxy resin system. The pre-preg is use as the adhesive to form the laminated stack of these multiple layers. This is done by lamination machine that works under high temperature and pressure.

 

The different thickness of pre-preg can be obtained by combining different pre-preg together for instance, a thickness of 0.19mm can be obtained by combining 2116 and 1080 type pre-preg.

 

The Issues related to PCB layer stack-up:

 

1. The Interlayer offset issue is seen in layer stack-up. This can be prevented by using the hot melting + rivet + dowel method.

 

2. Stack-up measling is another issue while stacking up your board. Use silicon pads along with epoxy plate during arrangement of board. This helps uniformity in thickness of board and balancing the pressure and eradicate measling.

 

Key Tips for Good Layer Stack-up and routing:

 

Symmetric Strip Line

 

1. Use of multiple ground planes will lower the impedance and decrease EMI radiation

 

2. The radiation can be contained by routing the high speed signal through buried layers

 

3. Close coupling of signal layers to their respective planes < 10 mil

 

4. Couple the GND and PWR plane as close as possible

 

5. Signal layers and planes should be adjacent to each other

 

6. The signal trace should be centered between two reference planes in symmetric strip line configuration. However this is difficult to accomplish because of different core or pre-preg material above and below the signal trace.

 

7. In dual strip line structure the two signal traces should be placed orthogonal to each other between the two reference planes on adjacent layers. This will help minimize cross talk and improve signal integrity between two signal traces. This structure is useful for differential mode signaling in high speed designs to reduce noise.

 

8. The value of impedance is determined by the width and thickness of signal trace, the dielectric constant of core or pre-preg on either side of trace and the configuration of trace and planes.

 

9. For 8 layer PCB, do not use more than 2 signal layers between the planes

 

10. In 8 layer PCB stack up, two planes GND and VCC are added to the center of the substrate allowing tight coupling between center planes and dramatically reducing cross talk and improving signal integrity. This configuration is commonly used in DDR2 and DD3 PCB design.

 

11. For 6 layer PCB, the two surface layers (top and bottom) are used for low frequency signal traces while the buried signal layers are for high frequency or high speed signal traces.

 

12. For 6 layer PCB, refer to point 3 above  to improve the EMC (Electromagnetic Compatibility)

 

13. For 4 layer PCB, refer to point 3 above to improve the EMC (Electromagnetic Compatibility)

 

14. For 4 layer PCB, the close trace to plane coupling will reduce cross talk, improve signal integrity and control impedance to acceptable range of 50 to 60 ohms. Use large core (~ 40 mil) between power and ground planes.

 

15. The lower the impedance from acceptable range will drain more current not good for PDN

 

16. The higher impedance from acceptable range will cause EMI and interference to external devices

 

17. As a rule of thumb, the 4 layer PCB will radiate EMI 14 dB less than the EMI radiated by 2 layer PCB

 

18. The effect of solder mask will vary the impedance to 2 to 3 ohms. But as thickness of trace increase the less the effect of solder mask on impedance

 

Conclusion:

 

The Layer Stack planning is the whole subject to study and requires highly professional PCB layout designer to cater with the signal integrity issues as discussed. A good layer stack-up plan can greatly increase the performance of PCB and result in a high quality end product.

 

Layer Stack Example of 6-Layer PCB