How to Improve the Radiation Interference of SDRAM Signals in PCB Design

Some STM32 application customers who use external SDRAM report that their products are in EMC testing, and there is a problem of excessive radiation interference due to SDRAM signals. In the terminal products, if the casing can not be used to shield the radiation interference, such problems often need to be solved by modifying the PCB design of the SDRAM signal.

 

Here is an overview of how to improve the radiation interference problem in the design of SDRAM PCB application, for reference.

 

How to Improve the Radiation Interference of SDRAM Signals in PCB Design

 

SDRAM Radiation Interference Countermeasures in PCB Design

 

Because SDRAM operates at a higher frequency and has steeper rising and falling edges, it is necessary to process its signal traces in high-speed signal transmission lines in PCB design. Pay attention to the following basic principles:

 

1. Maintain the integrity of the SDRAM signal

 

The distortion of the SDRAM signal will further broaden the radiation spectrum of the signal, resulting in more serious radiation problems, so attention must be paid to the SDRAM signal integrity design.

 

---It is recommended to use 4 or more layers to control the characteristic impedance of the SDRAM signal to 50 ohms, to minimize the use of vias on the SDRAM bus, to maintain impedance continuity, and to reduce signal reflection caused by impedance discontinuities. ;

 

--- SDRAM signal trace spacing should follow the 3W principle, the center spacing of the two traces should be kept at least 3 times the line width as much as possible, which can reduce the signal distortion caused by the interference between signals;

 

--- As close as possible to the SDRAM close to the MCU, shorten the length of the MCU to SDRAM signal trace (usually should not exceed 120 mm);

 

2. Maintain the shortest SDRAM signal return path

 

For multi-layer PCBs, the return path of a high-speed signal is the projection of its trace on the reference plane. In the PCB design, care should be taken to maintain the complete continuity of the reference plane. If the signal return path is cut due to signal switching or power layer splitting, etc., it is necessary to increase the layer-changing capacitance/layer-changing via and power plane crossing. A capacitor or the like ensures that the SDRAM signal has the shortest return path.

 

Maintain the shortest SDRAM signal return path

 

 

3. Place the SDRAM signal (especially the clock signal) on the inner layer of the PCB.

 

In the SDRAM signal, the clock signal has the strongest radiation level, which can be reduced by placing it on the inner layer of the PCB and shielding the outer layer of copper foil.

For the STM32 FMC interface with SDRAM and FLASH design at the same time, since SDRAM and FLASH share some MCU pins, its complex routing topology further enhances the radiated interference of SDRAM signals. It is recommended to route SDRAM and FLASH. They are placed as much as possible on the inner layer of the PCB, and these signals are shielded at the ground plane on the outer layer of the PCB.

 

4. Keep the SDRAM trace area as far as possible from other signals/cables

 

Longer other traces or cables can be used as antennas to transmit the coupled SDRAM radiated signals, so they should be placed in the PCB away from the SDRAM signal and placed on these traces or cable connections if necessary. A magnetic bead or filter attenuates the SDRAM radiation signal.