FPGA or CPLD, and which one to use? It is a common question often asked by people who are first getting into hardware design. There will never be a definite answer on which one is better since it depends on the person’s needs.
FPGAs and CPLDs do the same thing: implement logic circuits. What sets them apart from each other is that FPGAs are much more flexible in terms of maximum configuration size and logic capacity. That is why experts such as RayMing PCB and Assembly say that FPGAs are better than CPLDs for complex designs. On the other hand, CPLDs have reduced power consumption, faster switching speeds, and lower cost per gate than FPGAs.
What is FPGA?
FPGA stands for Field Programmable Gate Array. An FPGA is a device that can store and program digital circuits during runtime.
The basic concept of an FPGA is that it implements all the logic functions in its logic gates. This means that they are not hard-coded into the FPGA by a designer. However, we can change them by just writing a program to the proprietary hardware description language (HDL).
It is a programmable FPGA with the following physical characteristics. Many logic elements and programmable interconnects.
Look-Up-Tables (LUT) blocks allow the FPGA to have as many possible combinations of product terms.
It has RAM blocks that we can use to store the results generated by the logic gates when we are programming them. We can also reconfigure the gates in FPGAs within a shorter period compared to CPLDs. This is because we can clock the logic gates in FPGA faster than a CPLD.
It uses its OS to control the individual logic blocks written in it. The power consumption of an FPGA is less than a CPLD because of the smaller die size. This is because it does not have any transistors except the logic gates.
What is CPLD?
A CPLD is an integrated circuit (IC) consisting of logic cells, memory cells, and I/O cells. We connect them on a silicon chip by traditional wire bond bonds or flip-chip bonding. Unlike an FPGA, it is not programmable. We hardwire the full functionality of the logic block into the IC’s design, and we cannot change them even if we reprogram the IC.
CPLDs are suitable for implementing small designs since small ICs consume less power than the FPGA. They are also easy to use since there is no need to use a separate hardware description language (HDL) to configure the logic gates.
The main difference between CPLDs and FPGAs is that CPLDs do not change their configuration during runtime. It means they have a fixed functionality in time, while we can expand or change FPGAs at runtime.
The basic concept of a CPLD is that we implement all the logic functions in its logic gates. Manufacturers hardwire the configuration into the IC’s design, and they cannot change them even if we reprogram the IC.
CPLDs are suitable for implementing small designs since small ICs consume less power than FPGAs. They are also easy to use because there is no need to use a separate hardware description language (HDL) to configure the logic gates.
CPLD Architecture
CPLD architecture comprises an array of configurable logic blocks, programmable I/O cells, and programmable interconnects.
There are two types of logic blocks: CPLD logic block and Look-Up-Table (LUT) logic block.
These blocks are also known as configurable logic cells (CLC). CLCs are the building blocks of a CPLD. A CPLD can contain 32 to 4096 of these CLCs.
We refer to the I/O cells of the CPLD as Dedicated Input/Output (I/O) cells. I/O cells connect the CPLD to off-chip resources or other devices or memories. A CPLD can have from 4 to 255 I/O cells.
The CPLD has built-in redundancy in its logic gates to ensure high-speed operation. A CPLD has many logic gates on the chip, and multiple clock signals control its operation. Therefore, the complexity of a CPLD is lower than that of an FPGA because it consists of fewer logic gates.
CPLDs are faster than FPGAs since they have larger areas to implement more logic configurations.
There are two types of interconnects in a CPLD: programmable interconnect and configurable logic interconnect.
Programmable interconnects
One uses them to connect or route the signals between logic blocks. We can also reconfigure the interconnects within a shorter period compared to CPLDs.
The CPLD has fixed functionality in time, while we can expand or change FPGA at runtime.
While we can expand FPGAs at runtime and reconfigure CPLDs within a specified period, CPLDs have a limited amount of programmable interconnects, the maximum number being 256. That is why they have their dedicated I/O cells.
A CPLD is suitable for implementing small designs since small ICs consume less power than FPGAs.
Configurable Logic Interconnect
We use configurable Logic Interconnect (CLI) to configure and route signals within the CPLD. These use small buffers to pass signals to other logic cell groups. We usually dedicate them to each group of logic gates in a CPLD. The buffers always work on the logic cells’ input side, and we need a dedicated clock signal on the output side of the logic cells.
CLI is essential for quick routing, but it does not allow parallel processing of signals. The speed of CPLD with configured I/O cells is faster than that without them.
These interconnect used to connect or route signals from one logic cell to another in a limited amount of time, usually less than 100ns. This interconnect has no buffers (input or output), and it does not use dedicated clock signals.
This interconnect is useful in configurable logic block cells with many input pins, such as a LUT.
The speed of CPLDs with configured I/O cells is faster than that without them.
FPGA Architecture
The FPGA architecture comprises an array of logic blocks and interconnects. These logic blocks include individual logic gates connected by programmable interconnects capable of routing multiple signals simultaneously.
The basic concept behind the FPGA architecture is that we implement all the logic functions in its logic gates. The manufacturer hardwires the configuration into the IC’s design. Also, they can change them by programming specific bit patterns at runtime.
Manufacturers combine multiple logic gates to form logic blocks in the FPGA architecture. These logic blocks are then connected to form the full FPGA circuit or design.
FPUs are suitable for implementing complex designs. They provide many programmable interconnects and flexibility to change their functionality at runtime.
The FPGA has a larger die size than CPLDs because it has more logic functions implemented on its chip.
FPGA architecture has two types of logic blocks: dedicated input and output (DIO) cells and configurable logic block (CLB) cells.
Dedicated input and output (DIO) cells
The DIO cells connect the FPGA to off-chip resources or other devices or memories. We use the CLB to implement complex functions such as digital filters and digital multipliers to process multiple signals simultaneously.
The number of DIO cells is usually more significant than that of CLBs. An FPGA can have from 64 to 4096 DIO cells and 1 to 128 CLBs.
Configurable logic block (CLB) cells
We use the configurable logic block (CLB) to implement complex functions such as arithmetic logic units (ALUs) and multipliers. These cells help implement simple functions such as basic logic gates. In this case, a CLB can implement a single logic gate. The number of these cells is less than that of DIO cells.
There are two types of CLBs in an FPGA: Row-Specific CLBs and Column-Specific CLBs. We use the row-specific CLBs to implement row-oriented designs. For example, digital systems have a shorter delay than column-specific CLBs. We use the column-specific CLBs for implementing column-oriented designs. Also, it requires a large number of resources compared to the row-specific CLBs.
The FPGA architecture is scalable, and we can reconfigure them at runtime. This implies that the FPGA design needs implementation in a smaller version of the original design.
CPLD vs. FPGA Key Differences
FPGA and CPLD, which one should you use or better? In digital electronics, many ICs are available with different characteristics and features. We label these ICs according to their performance, the area they take, the power they consume, etc.
1. Starting the Work
As discussed earlier, an FPGA has a larger die size than CPLDs. That’s why the application engineer starts with the design using an FPGA first. When he meets the requirement, he can start implementing it on a CPLD chip. On the other hand, CPLD is a better choice for many reasons in digital electronics. If you want to start your career in this domain, you should consider using a CPLD.
2. Number of I/O Pins
FPGAs have more I/O pins than CPLD because a few more pins are valuable in interconnecting more entities in an FPGA than in a CPLD chip. For example, a digital multiplier module will have more I/O pins than a single multiplier, and a digital filter module will have more I/O pins than the digital system.
3. Stability
In the field of digital electronics, FPGAs are more stable than CPLDs. We maintain stability in the FPGA by using more decoupling capacitors and power supplies than CPLDs. This is because a small change in the design requires additional routing of signals. It will affect the power consumption of FPGAs more than that for CPLDs.
4. Timing Analysis
When comparing timing analysis of a circuit implemented in an FPGA and a CPLD, FPGA comes with a larger margin of error. This is because CPLDs are faster as they use smaller buffers and faster logic blocks than an FPGA. However, the CPLD is slower than an FPGA due to the larger logic cells.
5. Logic Resources
An FPGA or CPLD consists of logic blocks, and the number of logic blocks varies from one chip to another. Each logic block contains a fixed number of logic gates in an FPGA, and we can configure it at runtime. Since each logic block contains a fixed number of logic elements, the resources in an FPGA are few based on the type of function it will perform. For example, you need more resources to make an FIR filter than required for an 8-bit counter.
6. Flexibility
In digital electronics, CPLDs are not as flexible as FPGAs. In a CPLD, the manufacturer hardwires logic functions or cells, and we can’t configure them at runtime like an FPGA. However, in some cases, flexibility is not a big concern. If you have a specific requirement for your circuits. For example, a fixed number of clock cycle delays or a fixed number of inputs and outputs, then you should consider using a CPLD.
7. Security
With the implementation of a small microcontroller, we can use a CPLD chip for implementing small secure microcontrollers. Due to this reason, people widely use CPLDs for making security systems or chips in digital electronics.
8. Static Versus Dynamic Logic
FPGAs are better than CPLD in static logic because they are much more flexible and remain unchanged during power cycles. Unlike CPLD cells, we need to reconfigure every time they power the chip on again. On the other hand, CPLDs are much better than FPGAs in dynamic logic. This is because we can reconfigure the system without turning off the power supply of a CPLD.
9. Reprogramming
In the digital electronics world, we do the configuration of an FPGA by loading new configuration files and then reprogramming the logic blocks. However, in the CPLD domain, there is no need to configure a chip, and we can configure it at runtime.
10. System Area and Power Consumption
FPGAs consume more power and take more area than CPLDs. In an FPGA, each logic block has a fixed size, and we add additional blocks only by increasing the number of pins. In a CPLD, we can increase the number of logic blocks or decrease with a few extra pins. CPLDs are also faster than FPGAs because they use fewer cells and a lower fan-out.
11. Price
FPGAs are more expensive than CPLDs. FPGA costs are because it uses more expensive resources like capacitors and power supplies. In fact, in the world of digital electronics, FPGAs are the most expensive ICs, and we consider them for a few cents extra. You get a more powerful chip. So if you want to consider a high-performance chip, you need to buy an FPGA.
Benefits of using CPLD
CPLDs have several advantages over FPGAs in terms of flexibility and cost. Below are the advantages of CPLDs as compared to FPGAs.
1. Configurable Application
One of the essential advantages of using a CPLD chip is configuring the applications by changing configuration files. You can use a standard CPLD application unless the designer programs the chip and install new configuration files.
2. Price
FPGAs are expensive in digital electronics as they have many logic blocks and consume more power than a single CPLD chip. CPLDs are cheaper as compared to FPGAs.
3. Security
We can use a microcontroller implemented in a CPLD chip to implement secure applications in digital electronics. CPLDs are widely essential, making security systems and small microcontrollers.
4. Reprogramming
We can configure CPLDs at runtime because they have internal RAM cells. One can write it by loading new configuration files into the device. However, we cant program an FPGA at runtime.
5. Ease of Use
CPLDs are much easier to use in digital electronics than FPGAs because there is no need to program the chip or install new configuration files. We can also program them at any time of your choice. This makes CPLDs preferable to FPGAs in many areas like education and hobby projects.
Advantages of FPGA over CPLDs
FPGAs have more advantages over CPLDs. The advantages of FPGA over CPLDs are:
a. Flexibility
The flexibility of an FPGA chip is much more than that of a CPLD chip. This is because it can incorporate any number of logic functions and configuration blocks. On the other hand, we can use a CPLD only for one specific application.
b. Configurability
We do the configuration of an FPGA by using a configuration file, and we can reconfigure it at runtime. On the contrary, we must configure a CPLD chip before using it. You can’t reconfigure it unless you remove it and get it reconfigured with new configuration files.
c. Power Efficiency
FPGAs consume less power than CPLDs because the programmable logic blocks use very little power. Some FPGAs have a fan-out of 2 or 3, whereas CPLDs can have a fan-out of more than 100. This is why we consider FPGAs more efficient, and they consume less power than CPLDs in many applications.
d. Cost Saver
FPGAs use much fewer resources and consume much less power than CPLDs. So, we consider FPGAs the most efficient ICs in the world of digital electronics.
e. High-Performance Chip
FPGAs use fewer resources and consume less power than CPLDs. That is why we consider them very expensive in cost and energy consumption. So FPGAs are more economical than CPLDs in many computers and other mathematical fields of application.
Limitation of CPLD
There are some limitations on CPLDs as compared to FPGAs.
a. High Fan-Out
CPLDs have a low fan-out of about 2 or 3, much less than an FPGA. So you can’t fit as many logic blocks or inputs and outputs in a single chip compared to an FPGA. This is why we consider CPLDs limited in their applications compared to FPGAs.
b. speed
The speed of CPLDs and FPGAs are equal because they both use fewer logic cells. However, the speed of an FPGA is much more than that of a CPLD as it uses fewer logic cells. So in terms of speed, we consider FPGAs to be more efficient than CPLDs.
c. flexibility
We can use FPGAs for a wide variety of applications compared to CPLDs. As FPGAs have multiple input and output pins. They are essential in implementing various applications in digital electronics. However, we can use a CPLD chip only for one specific application because it has limited pins and has much flexibility like FPGAs.
d. Reprogramming
We can program FPGAs at any time of your choice because they can have internal RAM cells in them and configure them at runtime. However, we can’t program CPLDs at runtime because we must reconfigure the entire chip with new configuration files.
e. Ease of Use
CPLDs are much easier to use than FPGAs as you can’t install new configuration files or program the chip at any time of your choice. So it is much more convenient to use CPLDs for standard applications in digital electronics.
Limitations of FPGA
There are some limitations on FPGAs as compared to CPLDs.
a. Flexibility
FPGAs have a limited number of input and output pins, much less than CPLDs. So their applications have a limitation in many areas like LCD screens in computers and mathematical fields of application.
b. speed
FPGAs consume less power and use fewer resources than CPLDs. So their applications have a limitation in the field of digital electronics.
c. Cost Saver
FPGAs use fewer resources and consume less power as compared to CPLDs. So their applications have a limitation in digital electronics. For example, LCD screens, GPS systems, and other electrical hardware of every kind in a computer or other electronic equipment.
d. Cost
We consider FPGAs much more expensive than CPLDs for many reasons. For example, cost of development, higher initial cost per chip, and high power consumption. So their applications have a limitation in digital electronics. For instance, LCD screens, GPS systems, and other electrical hardware of every kind in a computer or other electronic equipment.
PLCC68 series, Stamp size FPGA Module
PLCC68 series, coined from PLCC68, is a stamp size FPGA module. It is a package of CPLD and FPGA on a single board. This module consists of two separate ICs on a single board, i.e., one chip is the FPGA, and the other is CPLD. The FPGA on this module is XC68HC12EA9, and they mount it on a 48-pin PLCC68 type package with 8.3 mm × 12.8 mm. The CPLD on this board is XC9572XL, and they mount on a 52-pin PLCC68 type package with 8.3 mm × 12.8 mm. This module has two rows of pins on both sides. The first row of pins on the FPGA side has 32 pins, including four mounting holes, an ICSP connector, and 27 general-purpose IOs. The second row of pins on the FPGA side has four mounting holes and the same number of general-purpose IOs as the preceding row.
On the other side, the CPLD has two rows of general-purpose IOs and an ICSP connector. This module contains all the blocks required for implementing digital logic functions. They include two 32-bit registers (R1 & R2) of the block RAM and data routing block, logic block interface (BLIF), arithmetic and logic unit (ALU), and register file (RF). It also includes a clock generator to generate internal clock signals to configure each gate.
Examples of these series include:
INTEL (ALTERA)
- Cyclone 10 LP U256 PLCC68 FPGA Module, FPGA/CPLD (10CL025YU256C8G, 10CL016YU256C8G, 10CL010YU256C8G, and 10CL006YU256C8G, Series AP68-09.
- MAX 10 PLCC68 FPGA Module, FPGA/CPLD (10M08SAU169C8GES), series AP68-08.
- Cyclone V PLCC68 FPGA Module, FPGA/CPLD (5CEBA4U15C8N), series AP68-07.
- MAX 10 DCU324 PLCC68 FPGA Module, FPGA/CPLD (10M16DCU324I7G and 10M08DCU324I7G), series AP68-10.
- Cyclone V PLCC68 FPGA Module, FPGA/CPLD (5CEBA4U15C8N), series AP68-06Z
- MAX II PLCC68 CPLD Module, FPGA/CPLD (EPM570F100C5N and EPM240F100C5N), Series AP68-01.
- Cyclone III PLCC68 FPGA Module, FPGA/CPLD (EP3C25U256C8N), series AP68-04.
- MAX V PLCC68 CPLD Module, FPGA/CPLD (5M570ZF256C5N), series AP68-02.
- Cyclone III PLCC68 FPGA Module, FPGA/CPLD (EP3C10U256C8N and EP3C5U256C8N, series AP68-03.
XILINX
- Spartan-7 PLCC68 FPGA Module, FPGA/CPLD (XC7S50-1CSGA324C and XC7S25-1CSGA324), series XP68-06.
- Artix-7 PLCC68 FPGA Module, FPGA/CPLD (XC7A100T-1CSG324C, XC7A75T-1CSG324C, XC7A50T-1CSG324C, XC7A35T-1CSG324C, and XC7A15T-1CSG324C), series XP68-05.
- Spartan-6 PLCC68 FPGA Module, FPGA/CPLD (XC6SLX45-2CSG324C), series XP68-04.
- Spartan 6 PLCC68 FPGA Module, FPGA/CPLD (XC6SLX45-2CSG324C), series XP68-03.
- Spartan-3AN PLCC68 FPGA Module, FPGA/CPLD (XC3S200AN-4FTG256C), series XP68-02.
- Spartan 6 PLCC68 FPGA Module, FPGA/CPLD (XC6SLX16-2CSG225C), series XP68-01.
Conclusion
There is a wide range of applications in digital electronics where we can use both CPLDs and FPGAs. However, most applications require high-performance chips such as FPGAs. So you have to select the appropriate CPLD or FPGA chip for your application.
Furthermore, you should consider the issue of price and power efficiency when you need to choose between CPLDs and FPGAs.
